[llvm] r225160 - Replace several 'assert(false' with 'llvm_unreachable' or fold a condition into the assert.
David Blaikie
dblaikie at gmail.com
Mon Jan 5 09:11:38 PST 2015
On Mon, Jan 5, 2015 at 2:15 AM, Craig Topper <craig.topper at gmail.com> wrote:
> Author: ctopper
> Date: Mon Jan 5 04:15:49 2015
> New Revision: 225160
>
> URL: http://llvm.org/viewvc/llvm-project?rev=225160&view=rev
> Log:
> Replace several 'assert(false' with 'llvm_unreachable' or fold a condition
> into the assert.
>
> Modified:
> llvm/trunk/lib/CodeGen/CodeGenPrepare.cpp
> llvm/trunk/lib/CodeGen/JumpInstrTables.cpp
> llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
> llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h
> llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
> llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
> llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp
> llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
> llvm/trunk/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp
> llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp
> llvm/trunk/lib/Target/Mips/MipsLongBranch.cpp
> llvm/trunk/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
> llvm/trunk/lib/Target/NVPTX/NVPTXISelLowering.cpp
> llvm/trunk/lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp
> llvm/trunk/lib/Target/X86/X86FixupLEAs.cpp
> llvm/trunk/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
>
> Modified: llvm/trunk/lib/CodeGen/CodeGenPrepare.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/CodeGenPrepare.cpp?rev=225160&r1=225159&r2=225160&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/CodeGenPrepare.cpp (original)
> +++ llvm/trunk/lib/CodeGen/CodeGenPrepare.cpp Mon Jan 5 04:15:49 2015
> @@ -3970,7 +3970,8 @@ void VectorPromoteHelper::promoteImpl(In
> isa<UndefValue>(Val) ||
> canCauseUndefinedBehavior(ToBePromoted, U.getOperandNo()));
> } else
> - assert(0 && "Did you modified shouldPromote and forgot to update
> this?");
> + llvm_unreachable("Did you modified shouldPromote and forgot to
> update "
> + "this?");
>
This one could be rolled into the prior else if.
if (...)
...
else if (...)
...
else
unreachable
->
if (...)
...
else
assert(...)
...
(also, the grammar on that failure string is... odd)
> ToBePromoted->setOperand(U.getOperandNo(), NewVal);
> }
> Transition->removeFromParent();
>
> Modified: llvm/trunk/lib/CodeGen/JumpInstrTables.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/JumpInstrTables.cpp?rev=225160&r1=225159&r2=225160&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/JumpInstrTables.cpp (original)
> +++ llvm/trunk/lib/CodeGen/JumpInstrTables.cpp Mon Jan 5 04:15:49 2015
> @@ -117,8 +117,8 @@ bool replaceGlobalValueIndirectUse(Globa
> if (!isa<GlobalAlias>(C))
> C->replaceUsesOfWithOnConstant(GV, V, U);
> } else {
> - assert(false && "The Use of a Function symbol is neither an
> instruction nor"
> - " a constant");
> + llvm_unreachable("The Use of a Function symbol is neither an
> instruction "
> + "nor a constant");
>
Same thing could be done here, ish.
if (...)
...
else if (x = dyn_cast(...))
...
else
unreachable
->
if (...)
...
else
x = cast(...);
Similarly for others.
I'm not sure any of what I suggestion is a sufficient improvement to be
worth your time - but since you were doing this stuff, I figured I'd
mention it in case it took your fancy.
> }
>
> return true;
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=225160&r1=225159&r2=225160&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Mon Jan 5
> 04:15:49 2015
> @@ -9735,7 +9735,7 @@ bool DAGCombiner::MergeConsecutiveStores
> } else if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Val))
> {
> StoreInt|= C->getValueAPF().bitcastToAPInt().zext(StoreBW);
> } else {
> - assert(false && "Invalid constant element type");
> + llvm_unreachable("Invalid constant element type");
> }
> }
>
>
> Modified:
> llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h?rev=225160&r1=225159&r2=225160&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h
> (original)
> +++ llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h
> Mon Jan 5 04:15:49 2015
> @@ -51,7 +51,7 @@ enum ShiftExtendType {
> /// getShiftName - Get the string encoding for the shift type.
> static inline const char *getShiftExtendName(AArch64_AM::ShiftExtendType
> ST) {
> switch (ST) {
> - default: assert(false && "unhandled shift type!");
> + default: llvm_unreachable("unhandled shift type!");
> case AArch64_AM::LSL: return "lsl";
> case AArch64_AM::LSR: return "lsr";
> case AArch64_AM::ASR: return "asr";
>
> Modified: llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp?rev=225160&r1=225159&r2=225160&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
> (original)
> +++ llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp Mon
> Jan 5 04:15:49 2015
> @@ -132,7 +132,7 @@ static uint64_t adjustFixupValue(unsigne
> int64_t SignedValue = static_cast<int64_t>(Value);
> switch (Kind) {
> default:
> - assert(false && "Unknown fixup kind!");
> + llvm_unreachable("Unknown fixup kind!");
> case AArch64::fixup_aarch64_pcrel_adr_imm21:
> if (SignedValue > 2097151 || SignedValue < -2097152)
> report_fatal_error("fixup value out of range");
> @@ -239,7 +239,7 @@ bool AArch64AsmBackend::fixupNeedsRelaxa
>
> void AArch64AsmBackend::relaxInstruction(const MCInst &Inst,
> MCInst &Res) const {
> - assert(false && "AArch64AsmBackend::relaxInstruction() unimplemented");
> + llvm_unreachable("AArch64AsmBackend::relaxInstruction() unimplemented");
> }
>
> bool AArch64AsmBackend::writeNopData(uint64_t Count, MCObjectWriter *OW)
> const {
>
> Modified:
> llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp?rev=225160&r1=225159&r2=225160&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
> (original)
> +++ llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
> Mon Jan 5 04:15:49 2015
> @@ -437,8 +437,7 @@ AArch64MCCodeEmitter::getVecShifterOpVal
> return 3;
> }
>
> - assert(false && "Invalid value for vector shift amount!");
> - return 0;
> + llvm_unreachable("Invalid value for vector shift amount!");
> }
>
> uint32_t
>
> Modified: llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp?rev=225160&r1=225159&r2=225160&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp (original)
> +++ llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp Mon Jan 5 04:15:49
> 2015
> @@ -891,7 +891,7 @@ PredicateInstruction(MachineInstr *MI,
> continue;
> }
> else {
> - assert(false && "Unexpected operand type");
> + llvm_unreachable("Unexpected operand type");
> }
> }
> }
>
> Modified: llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp?rev=225160&r1=225159&r2=225160&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp (original)
> +++ llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp Mon Jan 5
> 04:15:49 2015
> @@ -1412,9 +1412,7 @@ bool MipsAsmParser::needsExpansion(MCIns
> bool MipsAsmParser::expandInstruction(MCInst &Inst, SMLoc IDLoc,
> SmallVectorImpl<MCInst>
> &Instructions) {
> switch (Inst.getOpcode()) {
> - default:
> - assert(0 && "unimplemented expansion");
> - return true;
> + default: llvm_unreachable("unimplemented expansion");
> case Mips::LoadImm32Reg:
> return expandLoadImm(Inst, IDLoc, Instructions);
> case Mips::LoadImm64Reg:
>
> Modified: llvm/trunk/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp?rev=225160&r1=225159&r2=225160&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp (original)
> +++ llvm/trunk/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp Mon Jan 5
> 04:15:49 2015
> @@ -134,8 +134,8 @@ static void printExpr(const MCExpr *Expr
> } else if (const MipsMCExpr *ME = dyn_cast<MipsMCExpr>(Expr)) {
> ME->print(OS);
> return;
> - } else if (!(SRE = dyn_cast<MCSymbolRefExpr>(Expr)))
> - assert(false && "Unexpected MCExpr type.");
> + } else
> + SRE = cast<MCSymbolRefExpr>(Expr);
>
> MCSymbolRefExpr::VariantKind Kind = SRE->getKind();
>
>
> Modified: llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp?rev=225160&r1=225159&r2=225160&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp (original)
> +++ llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp Mon Jan 5 04:15:49 2015
> @@ -144,7 +144,6 @@ bool Mips16InstrInfo::expandPostRAPseudo
> /// opcode, e.g. turning BEQ to BNE.
> unsigned Mips16InstrInfo::getOppositeBranchOpc(unsigned Opc) const {
> switch (Opc) {
> - default: llvm_unreachable("Illegal opcode!");
> case Mips::BeqzRxImmX16: return Mips::BnezRxImmX16;
> case Mips::BnezRxImmX16: return Mips::BeqzRxImmX16;
> case Mips::BeqzRxImm16: return Mips::BnezRxImm16;
> @@ -166,8 +165,7 @@ unsigned Mips16InstrInfo::getOppositeBra
> case Mips::BtnezT8SltX16: return Mips::BteqzT8SltX16;
> case Mips::BtnezT8SltiX16: return Mips::BteqzT8SltiX16;
> }
> - assert(false && "Implement this function.");
> - return 0;
> + llvm_unreachable("Illegal opcode!");
> }
>
> static void addSaveRestoreRegs(MachineInstrBuilder &MIB,
> @@ -288,7 +286,7 @@ void Mips16InstrInfo::adjustStackPtrBig(
> void Mips16InstrInfo::adjustStackPtrBigUnrestricted(
> unsigned SP, int64_t Amount, MachineBasicBlock &MBB,
> MachineBasicBlock::iterator I) const {
> - assert(false && "adjust stack pointer amount exceeded");
> + llvm_unreachable("adjust stack pointer amount exceeded");
> }
>
> /// Adjust SP by Amount bytes.
>
> Modified: llvm/trunk/lib/Target/Mips/MipsLongBranch.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsLongBranch.cpp?rev=225160&r1=225159&r2=225160&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/Mips/MipsLongBranch.cpp (original)
> +++ llvm/trunk/lib/Target/Mips/MipsLongBranch.cpp Mon Jan 5 04:15:49 2015
> @@ -110,8 +110,7 @@ static MachineBasicBlock *getTargetMBB(c
> return MO.getMBB();
> }
>
> - assert(false && "This instruction does not have an MBB operand.");
> - return nullptr;
> + llvm_unreachable("This instruction does not have an MBB operand.");
> }
>
> // Traverse the list of instructions backwards until a non-debug
> instruction is
>
> Modified: llvm/trunk/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTXAsmPrinter.cpp?rev=225160&r1=225159&r2=225160&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/NVPTX/NVPTXAsmPrinter.cpp (original)
> +++ llvm/trunk/lib/Target/NVPTX/NVPTXAsmPrinter.cpp Mon Jan 5 04:15:49
> 2015
> @@ -374,17 +374,15 @@ void NVPTXAsmPrinter::printReturnValStr(
> } else if (isa<PointerType>(Ty)) {
> O << ".param .b" << TLI->getPointerTy().getSizeInBits()
> << " func_retval0";
> - } else {
> - if ((Ty->getTypeID() == Type::StructTyID) || isa<VectorType>(Ty)) {
> - unsigned totalsz = TD->getTypeAllocSize(Ty);
> - unsigned retAlignment = 0;
> - if (!llvm::getAlign(*F, 0, retAlignment))
> - retAlignment = TD->getABITypeAlignment(Ty);
> - O << ".param .align " << retAlignment << " .b8 func_retval0[" <<
> totalsz
> - << "]";
> - } else
> - assert(false && "Unknown return type");
> - }
> + } else if ((Ty->getTypeID() == Type::StructTyID) ||
> isa<VectorType>(Ty)) {
> + unsigned totalsz = TD->getTypeAllocSize(Ty);
> + unsigned retAlignment = 0;
> + if (!llvm::getAlign(*F, 0, retAlignment))
> + retAlignment = TD->getABITypeAlignment(Ty);
> + O << ".param .align " << retAlignment << " .b8 func_retval0[" <<
> totalsz
> + << "]";
> + } else
> + llvm_unreachable("Unknown return type");
> } else {
> SmallVector<EVT, 16> vtparts;
> ComputeValueVTs(*TLI, Ty, vtparts);
>
> Modified: llvm/trunk/lib/Target/NVPTX/NVPTXISelLowering.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTXISelLowering.cpp?rev=225160&r1=225159&r2=225160&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/NVPTX/NVPTXISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/NVPTX/NVPTXISelLowering.cpp Mon Jan 5 04:15:49
> 2015
> @@ -905,16 +905,14 @@ NVPTXTargetLowering::getPrototype(Type *
> O << ".param .b" << size << " _";
> } else if (isa<PointerType>(retTy)) {
> O << ".param .b" << getPointerTy().getSizeInBits() << " _";
> + } else if ((retTy->getTypeID() == Type::StructTyID) ||
> + isa<VectorType>(retTy)) {
> + O << ".param .align "
> + << retAlignment
> + << " .b8 _["
> + << getDataLayout()->getTypeAllocSize(retTy) << "]";
> } else {
> - if((retTy->getTypeID() == Type::StructTyID) ||
> - isa<VectorType>(retTy)) {
> - O << ".param .align "
> - << retAlignment
> - << " .b8 _["
> - << getDataLayout()->getTypeAllocSize(retTy) << "]";
> - } else {
> - assert(false && "Unknown return type");
> - }
> + llvm_unreachable("Unknown return type");
> }
> O << ") ";
> }
>
> Modified: llvm/trunk/lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp?rev=225160&r1=225159&r2=225160&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp
> (original)
> +++ llvm/trunk/lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp Mon Jan
> 5 04:15:49 2015
> @@ -666,6 +666,7 @@ void X86AddressSanitizer32::InstrumentMe
> .addImm(7));
>
> switch (AccessSize) {
> + default: llvm_unreachable("Incorrect access size");
> case 1:
> break;
> case 2: {
> @@ -682,9 +683,6 @@ void X86AddressSanitizer32::InstrumentMe
> .addReg(ScratchRegI32)
> .addImm(3));
> break;
> - default:
> - assert(false && "Incorrect access size");
> - break;
> }
>
> EmitInstruction(
> @@ -715,15 +713,13 @@ void X86AddressSanitizer32::InstrumentMe
> {
> MCInst Inst;
> switch (AccessSize) {
> + default: llvm_unreachable("Incorrect access size");
> case 8:
> Inst.setOpcode(X86::CMP8mi);
> break;
> case 16:
> Inst.setOpcode(X86::CMP16mi);
> break;
> - default:
> - assert(false && "Incorrect access size");
> - break;
> }
> const MCExpr *Disp = MCConstantExpr::Create(kShadowOffset, Ctx);
> std::unique_ptr<X86Operand> Op(
> @@ -941,6 +937,7 @@ void X86AddressSanitizer64::InstrumentMe
> .addImm(7));
>
> switch (AccessSize) {
> + default: llvm_unreachable("Incorrect access size");
> case 1:
> break;
> case 2: {
> @@ -957,9 +954,6 @@ void X86AddressSanitizer64::InstrumentMe
> .addReg(ScratchRegI32)
> .addImm(3));
> break;
> - default:
> - assert(false && "Incorrect access size");
> - break;
> }
>
> EmitInstruction(
> @@ -990,15 +984,13 @@ void X86AddressSanitizer64::InstrumentMe
> {
> MCInst Inst;
> switch (AccessSize) {
> + default: llvm_unreachable("Incorrect access size");
> case 8:
> Inst.setOpcode(X86::CMP8mi);
> break;
> case 16:
> Inst.setOpcode(X86::CMP16mi);
> break;
> - default:
> - assert(false && "Incorrect access size");
> - break;
> }
> const MCExpr *Disp = MCConstantExpr::Create(kShadowOffset, Ctx);
> std::unique_ptr<X86Operand> Op(
>
> Modified: llvm/trunk/lib/Target/X86/X86FixupLEAs.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FixupLEAs.cpp?rev=225160&r1=225159&r2=225160&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86FixupLEAs.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86FixupLEAs.cpp Mon Jan 5 04:15:49 2015
> @@ -283,6 +283,7 @@ void FixupLEAPass::processInstructionFor
> return;
> int addrr_opcode, addri_opcode;
> switch (opcode) {
> + default: llvm_unreachable("Unexpected LEA instruction");
> case X86::LEA16r:
> addrr_opcode = X86::ADD16rr;
> addri_opcode = X86::ADD16ri;
> @@ -296,8 +297,6 @@ void FixupLEAPass::processInstructionFor
> addrr_opcode = X86::ADD64rr;
> addri_opcode = X86::ADD64ri32;
> break;
> - default:
> - assert(false && "Unexpected LEA instruction");
> }
> DEBUG(dbgs() << "FixLEA: Candidate to replace:"; I->dump(););
> DEBUG(dbgs() << "FixLEA: Replaced by: ";);
>
> Modified: llvm/trunk/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Instrumentation/ThreadSanitizer.cpp?rev=225160&r1=225159&r2=225160&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
> (original)
> +++ llvm/trunk/lib/Transforms/Instrumentation/ThreadSanitizer.cpp Mon Jan
> 5 04:15:49 2015
> @@ -422,7 +422,7 @@ bool ThreadSanitizer::instrumentLoadOrSt
> static ConstantInt *createOrdering(IRBuilder<> *IRB, AtomicOrdering ord) {
> uint32_t v = 0;
> switch (ord) {
> - case NotAtomic: assert(false);
> + case NotAtomic: llvm_unreachable("unexpected atomic ordering!");
> case Unordered: // Fall-through.
> case Monotonic: v = 0; break;
> // case Consume: v = 1; break; // Not specified yet.
>
>
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