<div dir="ltr"><br><div class="gmail_extra"><br><div class="gmail_quote">On Mon, Jan 5, 2015 at 2:15 AM, Craig Topper <span dir="ltr"><<a href="mailto:craig.topper@gmail.com" target="_blank">craig.topper@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left-width:1px;border-left-color:rgb(204,204,204);border-left-style:solid;padding-left:1ex">Author: ctopper<br>
Date: Mon Jan 5 04:15:49 2015<br>
New Revision: 225160<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=225160&view=rev" target="_blank">http://llvm.org/viewvc/llvm-project?rev=225160&view=rev</a><br>
Log:<br>
Replace several 'assert(false' with 'llvm_unreachable' or fold a condition into the assert.<br>
<br>
Modified:<br>
llvm/trunk/lib/CodeGen/CodeGenPrepare.cpp<br>
llvm/trunk/lib/CodeGen/JumpInstrTables.cpp<br>
llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp<br>
llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h<br>
llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp<br>
llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp<br>
llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp<br>
llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp<br>
llvm/trunk/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp<br>
llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp<br>
llvm/trunk/lib/Target/Mips/MipsLongBranch.cpp<br>
llvm/trunk/lib/Target/NVPTX/NVPTXAsmPrinter.cpp<br>
llvm/trunk/lib/Target/NVPTX/NVPTXISelLowering.cpp<br>
llvm/trunk/lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp<br>
llvm/trunk/lib/Target/X86/X86FixupLEAs.cpp<br>
llvm/trunk/lib/Transforms/Instrumentation/ThreadSanitizer.cpp<br>
<br>
Modified: llvm/trunk/lib/CodeGen/CodeGenPrepare.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/CodeGenPrepare.cpp?rev=225160&r1=225159&r2=225160&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/CodeGenPrepare.cpp?rev=225160&r1=225159&r2=225160&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/CodeGenPrepare.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/CodeGenPrepare.cpp Mon Jan 5 04:15:49 2015<br>
@@ -3970,7 +3970,8 @@ void VectorPromoteHelper::promoteImpl(In<br>
isa<UndefValue>(Val) ||<br>
canCauseUndefinedBehavior(ToBePromoted, U.getOperandNo()));<br>
} else<br>
- assert(0 && "Did you modified shouldPromote and forgot to update this?");<br>
+ llvm_unreachable("Did you modified shouldPromote and forgot to update "<br>
+ "this?");<br></blockquote><div><br>This one could be rolled into the prior else if.<br><br>if (...)<br> ...<br>else if (...)<br> ...<br>else<br> unreachable<br><br>-><br><br>if (...)<br> ...<br>else<br> assert(...)<br> ...<br><br>(also, the grammar on that failure string is... odd)<br> </div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left-width:1px;border-left-color:rgb(204,204,204);border-left-style:solid;padding-left:1ex">
ToBePromoted->setOperand(U.getOperandNo(), NewVal);<br>
}<br>
Transition->removeFromParent();<br>
<br>
Modified: llvm/trunk/lib/CodeGen/JumpInstrTables.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/JumpInstrTables.cpp?rev=225160&r1=225159&r2=225160&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/JumpInstrTables.cpp?rev=225160&r1=225159&r2=225160&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/JumpInstrTables.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/JumpInstrTables.cpp Mon Jan 5 04:15:49 2015<br>
@@ -117,8 +117,8 @@ bool replaceGlobalValueIndirectUse(Globa<br>
if (!isa<GlobalAlias>(C))<br>
C->replaceUsesOfWithOnConstant(GV, V, U);<br>
} else {<br>
- assert(false && "The Use of a Function symbol is neither an instruction nor"<br>
- " a constant");<br>
+ llvm_unreachable("The Use of a Function symbol is neither an instruction "<br>
+ "nor a constant");<br></blockquote><div><br>Same thing could be done here, ish.<br><br>if (...)<br> ...<br>else if (x = dyn_cast(...))<br> ...<br>else<br> unreachable<br><br>-><br><br>if (...)<br> ...<br>else<br> x = cast(...);<br><br><br>Similarly for others.<br><br>I'm not sure any of what I suggestion is a sufficient improvement to be worth your time - but since you were doing this stuff, I figured I'd mention it in case it took your fancy.<br> </div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left-width:1px;border-left-color:rgb(204,204,204);border-left-style:solid;padding-left:1ex">
}<br>
<br>
return true;<br>
<br>
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=225160&r1=225159&r2=225160&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=225160&r1=225159&r2=225160&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Mon Jan 5 04:15:49 2015<br>
@@ -9735,7 +9735,7 @@ bool DAGCombiner::MergeConsecutiveStores<br>
} else if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Val)) {<br>
StoreInt|= C->getValueAPF().bitcastToAPInt().zext(StoreBW);<br>
} else {<br>
- assert(false && "Invalid constant element type");<br>
+ llvm_unreachable("Invalid constant element type");<br>
}<br>
}<br>
<br>
<br>
Modified: llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h?rev=225160&r1=225159&r2=225160&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h?rev=225160&r1=225159&r2=225160&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h (original)<br>
+++ llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h Mon Jan 5 04:15:49 2015<br>
@@ -51,7 +51,7 @@ enum ShiftExtendType {<br>
/// getShiftName - Get the string encoding for the shift type.<br>
static inline const char *getShiftExtendName(AArch64_AM::ShiftExtendType ST) {<br>
switch (ST) {<br>
- default: assert(false && "unhandled shift type!");<br>
+ default: llvm_unreachable("unhandled shift type!");<br>
case AArch64_AM::LSL: return "lsl";<br>
case AArch64_AM::LSR: return "lsr";<br>
case AArch64_AM::ASR: return "asr";<br>
<br>
Modified: llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp?rev=225160&r1=225159&r2=225160&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp?rev=225160&r1=225159&r2=225160&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp (original)<br>
+++ llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp Mon Jan 5 04:15:49 2015<br>
@@ -132,7 +132,7 @@ static uint64_t adjustFixupValue(unsigne<br>
int64_t SignedValue = static_cast<int64_t>(Value);<br>
switch (Kind) {<br>
default:<br>
- assert(false && "Unknown fixup kind!");<br>
+ llvm_unreachable("Unknown fixup kind!");<br>
case AArch64::fixup_aarch64_pcrel_adr_imm21:<br>
if (SignedValue > 2097151 || SignedValue < -2097152)<br>
report_fatal_error("fixup value out of range");<br>
@@ -239,7 +239,7 @@ bool AArch64AsmBackend::fixupNeedsRelaxa<br>
<br>
void AArch64AsmBackend::relaxInstruction(const MCInst &Inst,<br>
MCInst &Res) const {<br>
- assert(false && "AArch64AsmBackend::relaxInstruction() unimplemented");<br>
+ llvm_unreachable("AArch64AsmBackend::relaxInstruction() unimplemented");<br>
}<br>
<br>
bool AArch64AsmBackend::writeNopData(uint64_t Count, MCObjectWriter *OW) const {<br>
<br>
Modified: llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp?rev=225160&r1=225159&r2=225160&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp?rev=225160&r1=225159&r2=225160&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp (original)<br>
+++ llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp Mon Jan 5 04:15:49 2015<br>
@@ -437,8 +437,7 @@ AArch64MCCodeEmitter::getVecShifterOpVal<br>
return 3;<br>
}<br>
<br>
- assert(false && "Invalid value for vector shift amount!");<br>
- return 0;<br>
+ llvm_unreachable("Invalid value for vector shift amount!");<br>
}<br>
<br>
uint32_t<br>
<br>
Modified: llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp?rev=225160&r1=225159&r2=225160&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp?rev=225160&r1=225159&r2=225160&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp (original)<br>
+++ llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp Mon Jan 5 04:15:49 2015<br>
@@ -891,7 +891,7 @@ PredicateInstruction(MachineInstr *MI,<br>
continue;<br>
}<br>
else {<br>
- assert(false && "Unexpected operand type");<br>
+ llvm_unreachable("Unexpected operand type");<br>
}<br>
}<br>
}<br>
<br>
Modified: llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp?rev=225160&r1=225159&r2=225160&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp?rev=225160&r1=225159&r2=225160&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp (original)<br>
+++ llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp Mon Jan 5 04:15:49 2015<br>
@@ -1412,9 +1412,7 @@ bool MipsAsmParser::needsExpansion(MCIns<br>
bool MipsAsmParser::expandInstruction(MCInst &Inst, SMLoc IDLoc,<br>
SmallVectorImpl<MCInst> &Instructions) {<br>
switch (Inst.getOpcode()) {<br>
- default:<br>
- assert(0 && "unimplemented expansion");<br>
- return true;<br>
+ default: llvm_unreachable("unimplemented expansion");<br>
case Mips::LoadImm32Reg:<br>
return expandLoadImm(Inst, IDLoc, Instructions);<br>
case Mips::LoadImm64Reg:<br>
<br>
Modified: llvm/trunk/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp?rev=225160&r1=225159&r2=225160&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp?rev=225160&r1=225159&r2=225160&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp (original)<br>
+++ llvm/trunk/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp Mon Jan 5 04:15:49 2015<br>
@@ -134,8 +134,8 @@ static void printExpr(const MCExpr *Expr<br>
} else if (const MipsMCExpr *ME = dyn_cast<MipsMCExpr>(Expr)) {<br>
ME->print(OS);<br>
return;<br>
- } else if (!(SRE = dyn_cast<MCSymbolRefExpr>(Expr)))<br>
- assert(false && "Unexpected MCExpr type.");<br>
+ } else<br>
+ SRE = cast<MCSymbolRefExpr>(Expr);<br>
<br>
MCSymbolRefExpr::VariantKind Kind = SRE->getKind();<br>
<br>
<br>
Modified: llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp?rev=225160&r1=225159&r2=225160&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp?rev=225160&r1=225159&r2=225160&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp (original)<br>
+++ llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp Mon Jan 5 04:15:49 2015<br>
@@ -144,7 +144,6 @@ bool Mips16InstrInfo::expandPostRAPseudo<br>
/// opcode, e.g. turning BEQ to BNE.<br>
unsigned Mips16InstrInfo::getOppositeBranchOpc(unsigned Opc) const {<br>
switch (Opc) {<br>
- default: llvm_unreachable("Illegal opcode!");<br>
case Mips::BeqzRxImmX16: return Mips::BnezRxImmX16;<br>
case Mips::BnezRxImmX16: return Mips::BeqzRxImmX16;<br>
case Mips::BeqzRxImm16: return Mips::BnezRxImm16;<br>
@@ -166,8 +165,7 @@ unsigned Mips16InstrInfo::getOppositeBra<br>
case Mips::BtnezT8SltX16: return Mips::BteqzT8SltX16;<br>
case Mips::BtnezT8SltiX16: return Mips::BteqzT8SltiX16;<br>
}<br>
- assert(false && "Implement this function.");<br>
- return 0;<br>
+ llvm_unreachable("Illegal opcode!");<br>
}<br>
<br>
static void addSaveRestoreRegs(MachineInstrBuilder &MIB,<br>
@@ -288,7 +286,7 @@ void Mips16InstrInfo::adjustStackPtrBig(<br>
void Mips16InstrInfo::adjustStackPtrBigUnrestricted(<br>
unsigned SP, int64_t Amount, MachineBasicBlock &MBB,<br>
MachineBasicBlock::iterator I) const {<br>
- assert(false && "adjust stack pointer amount exceeded");<br>
+ llvm_unreachable("adjust stack pointer amount exceeded");<br>
}<br>
<br>
/// Adjust SP by Amount bytes.<br>
<br>
Modified: llvm/trunk/lib/Target/Mips/MipsLongBranch.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsLongBranch.cpp?rev=225160&r1=225159&r2=225160&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsLongBranch.cpp?rev=225160&r1=225159&r2=225160&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Mips/MipsLongBranch.cpp (original)<br>
+++ llvm/trunk/lib/Target/Mips/MipsLongBranch.cpp Mon Jan 5 04:15:49 2015<br>
@@ -110,8 +110,7 @@ static MachineBasicBlock *getTargetMBB(c<br>
return MO.getMBB();<br>
}<br>
<br>
- assert(false && "This instruction does not have an MBB operand.");<br>
- return nullptr;<br>
+ llvm_unreachable("This instruction does not have an MBB operand.");<br>
}<br>
<br>
// Traverse the list of instructions backwards until a non-debug instruction is<br>
<br>
Modified: llvm/trunk/lib/Target/NVPTX/NVPTXAsmPrinter.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTXAsmPrinter.cpp?rev=225160&r1=225159&r2=225160&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTXAsmPrinter.cpp?rev=225160&r1=225159&r2=225160&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/NVPTX/NVPTXAsmPrinter.cpp (original)<br>
+++ llvm/trunk/lib/Target/NVPTX/NVPTXAsmPrinter.cpp Mon Jan 5 04:15:49 2015<br>
@@ -374,17 +374,15 @@ void NVPTXAsmPrinter::printReturnValStr(<br>
} else if (isa<PointerType>(Ty)) {<br>
O << ".param .b" << TLI->getPointerTy().getSizeInBits()<br>
<< " func_retval0";<br>
- } else {<br>
- if ((Ty->getTypeID() == Type::StructTyID) || isa<VectorType>(Ty)) {<br>
- unsigned totalsz = TD->getTypeAllocSize(Ty);<br>
- unsigned retAlignment = 0;<br>
- if (!llvm::getAlign(*F, 0, retAlignment))<br>
- retAlignment = TD->getABITypeAlignment(Ty);<br>
- O << ".param .align " << retAlignment << " .b8 func_retval0[" << totalsz<br>
- << "]";<br>
- } else<br>
- assert(false && "Unknown return type");<br>
- }<br>
+ } else if ((Ty->getTypeID() == Type::StructTyID) || isa<VectorType>(Ty)) {<br>
+ unsigned totalsz = TD->getTypeAllocSize(Ty);<br>
+ unsigned retAlignment = 0;<br>
+ if (!llvm::getAlign(*F, 0, retAlignment))<br>
+ retAlignment = TD->getABITypeAlignment(Ty);<br>
+ O << ".param .align " << retAlignment << " .b8 func_retval0[" << totalsz<br>
+ << "]";<br>
+ } else<br>
+ llvm_unreachable("Unknown return type");<br>
} else {<br>
SmallVector<EVT, 16> vtparts;<br>
ComputeValueVTs(*TLI, Ty, vtparts);<br>
<br>
Modified: llvm/trunk/lib/Target/NVPTX/NVPTXISelLowering.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTXISelLowering.cpp?rev=225160&r1=225159&r2=225160&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTXISelLowering.cpp?rev=225160&r1=225159&r2=225160&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/NVPTX/NVPTXISelLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/NVPTX/NVPTXISelLowering.cpp Mon Jan 5 04:15:49 2015<br>
@@ -905,16 +905,14 @@ NVPTXTargetLowering::getPrototype(Type *<br>
O << ".param .b" << size << " _";<br>
} else if (isa<PointerType>(retTy)) {<br>
O << ".param .b" << getPointerTy().getSizeInBits() << " _";<br>
+ } else if ((retTy->getTypeID() == Type::StructTyID) ||<br>
+ isa<VectorType>(retTy)) {<br>
+ O << ".param .align "<br>
+ << retAlignment<br>
+ << " .b8 _["<br>
+ << getDataLayout()->getTypeAllocSize(retTy) << "]";<br>
} else {<br>
- if((retTy->getTypeID() == Type::StructTyID) ||<br>
- isa<VectorType>(retTy)) {<br>
- O << ".param .align "<br>
- << retAlignment<br>
- << " .b8 _["<br>
- << getDataLayout()->getTypeAllocSize(retTy) << "]";<br>
- } else {<br>
- assert(false && "Unknown return type");<br>
- }<br>
+ llvm_unreachable("Unknown return type");<br>
}<br>
O << ") ";<br>
}<br>
<br>
Modified: llvm/trunk/lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp?rev=225160&r1=225159&r2=225160&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp?rev=225160&r1=225159&r2=225160&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp Mon Jan 5 04:15:49 2015<br>
@@ -666,6 +666,7 @@ void X86AddressSanitizer32::InstrumentMe<br>
.addImm(7));<br>
<br>
switch (AccessSize) {<br>
+ default: llvm_unreachable("Incorrect access size");<br>
case 1:<br>
break;<br>
case 2: {<br>
@@ -682,9 +683,6 @@ void X86AddressSanitizer32::InstrumentMe<br>
.addReg(ScratchRegI32)<br>
.addImm(3));<br>
break;<br>
- default:<br>
- assert(false && "Incorrect access size");<br>
- break;<br>
}<br>
<br>
EmitInstruction(<br>
@@ -715,15 +713,13 @@ void X86AddressSanitizer32::InstrumentMe<br>
{<br>
MCInst Inst;<br>
switch (AccessSize) {<br>
+ default: llvm_unreachable("Incorrect access size");<br>
case 8:<br>
Inst.setOpcode(X86::CMP8mi);<br>
break;<br>
case 16:<br>
Inst.setOpcode(X86::CMP16mi);<br>
break;<br>
- default:<br>
- assert(false && "Incorrect access size");<br>
- break;<br>
}<br>
const MCExpr *Disp = MCConstantExpr::Create(kShadowOffset, Ctx);<br>
std::unique_ptr<X86Operand> Op(<br>
@@ -941,6 +937,7 @@ void X86AddressSanitizer64::InstrumentMe<br>
.addImm(7));<br>
<br>
switch (AccessSize) {<br>
+ default: llvm_unreachable("Incorrect access size");<br>
case 1:<br>
break;<br>
case 2: {<br>
@@ -957,9 +954,6 @@ void X86AddressSanitizer64::InstrumentMe<br>
.addReg(ScratchRegI32)<br>
.addImm(3));<br>
break;<br>
- default:<br>
- assert(false && "Incorrect access size");<br>
- break;<br>
}<br>
<br>
EmitInstruction(<br>
@@ -990,15 +984,13 @@ void X86AddressSanitizer64::InstrumentMe<br>
{<br>
MCInst Inst;<br>
switch (AccessSize) {<br>
+ default: llvm_unreachable("Incorrect access size");<br>
case 8:<br>
Inst.setOpcode(X86::CMP8mi);<br>
break;<br>
case 16:<br>
Inst.setOpcode(X86::CMP16mi);<br>
break;<br>
- default:<br>
- assert(false && "Incorrect access size");<br>
- break;<br>
}<br>
const MCExpr *Disp = MCConstantExpr::Create(kShadowOffset, Ctx);<br>
std::unique_ptr<X86Operand> Op(<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86FixupLEAs.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FixupLEAs.cpp?rev=225160&r1=225159&r2=225160&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FixupLEAs.cpp?rev=225160&r1=225159&r2=225160&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86FixupLEAs.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/X86FixupLEAs.cpp Mon Jan 5 04:15:49 2015<br>
@@ -283,6 +283,7 @@ void FixupLEAPass::processInstructionFor<br>
return;<br>
int addrr_opcode, addri_opcode;<br>
switch (opcode) {<br>
+ default: llvm_unreachable("Unexpected LEA instruction");<br>
case X86::LEA16r:<br>
addrr_opcode = X86::ADD16rr;<br>
addri_opcode = X86::ADD16ri;<br>
@@ -296,8 +297,6 @@ void FixupLEAPass::processInstructionFor<br>
addrr_opcode = X86::ADD64rr;<br>
addri_opcode = X86::ADD64ri32;<br>
break;<br>
- default:<br>
- assert(false && "Unexpected LEA instruction");<br>
}<br>
DEBUG(dbgs() << "FixLEA: Candidate to replace:"; I->dump(););<br>
DEBUG(dbgs() << "FixLEA: Replaced by: ";);<br>
<br>
Modified: llvm/trunk/lib/Transforms/Instrumentation/ThreadSanitizer.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Instrumentation/ThreadSanitizer.cpp?rev=225160&r1=225159&r2=225160&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Instrumentation/ThreadSanitizer.cpp?rev=225160&r1=225159&r2=225160&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Transforms/Instrumentation/ThreadSanitizer.cpp (original)<br>
+++ llvm/trunk/lib/Transforms/Instrumentation/ThreadSanitizer.cpp Mon Jan 5 04:15:49 2015<br>
@@ -422,7 +422,7 @@ bool ThreadSanitizer::instrumentLoadOrSt<br>
static ConstantInt *createOrdering(IRBuilder<> *IRB, AtomicOrdering ord) {<br>
uint32_t v = 0;<br>
switch (ord) {<br>
- case NotAtomic: assert(false);<br>
+ case NotAtomic: llvm_unreachable("unexpected atomic ordering!");<br>
case Unordered: // Fall-through.<br>
case Monotonic: v = 0; break;<br>
// case Consume: v = 1; break; // Not specified yet.<br>
<br>
<br>
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</blockquote></div><br></div></div>