[PATCH] [ARM] Don't break alignment when combining base updates into load/stores.

[Ahmed Bougacha]

r223862 caused a regression; quoting:
The selection logic for vld/vst doesn't care about less-than-standard alignment attributes.  In this case, the alignment of the loads is 1, but SelectVLD selected VLD1q64, because the result type was v2i64.  It was obvious from the testcases I added in that commit, but I didn't register the wrongness.

This patch introduces bitcasts if necessary, and changes the vld/vst type to one whose standard alignment matches the original load/store alignment.

http://reviews.llvm.org/D6759

Files:
  lib/Target/ARM/ARMISelLowering.cpp
  test/CodeGen/ARM/memcpy-inline.ll
  test/CodeGen/ARM/vector-load.ll
  test/CodeGen/ARM/vector-store.ll

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