[PATCH] [X86] Make EltsFromConsecutiveLoads code path work only on vectors it expects

[Sanjay Patel]

Hi Michael,
Thanks for notifying me about this bug. While your patch will prevent the crash, it will also prevent vector loads for i8 / i16, right? Is it possible to fix the condition to avoid the crash while still generating a vector load for all data types? 

For reference - while stepping through this path, I noticed another bug: 
http://llvm.org/bugs/show_bug.cgi?id=21790

For your testcase with i64, it looks like we'll end up with the optimal codegen, but only because we'll crack the 256-bit vector in half and then the two i64 loads will be treated like a full vector load the next time we call EltsFromConsecutiveLoads().

Can you add your testcase to test/CodeGen/X86/vec_loadsingles.ll (name change is probably in order at this point), so we have all of the related testcases in one file? See inline comments for the testcase itself.

================
Comment at: test/CodeGen/X86/elts-from-loads-256.ll:1
@@ +1,2 @@
+; RUN: llc -mcpu=corei7-avx < %s
+; EltsFromConsecutiveLoads has a code-path that should not kick-in for AVX-sized vectors
----------------
Use FileCheck for expected output.

================
Comment at: test/CodeGen/X86/elts-from-loads-256.ll:7-9
@@ +6,5 @@
+
+; Function Attrs: nounwind
+define void @test() #0 {
+  %1 = load i64 addrspace(1)** undef, align 8
+  %2 = getelementptr inbounds i64 addrspace(1)* %1, i64 0
----------------
Remove unnecessary test elements: addrspace, attributes.

================
Comment at: test/CodeGen/X86/elts-from-loads-256.ll:23
@@ +22,1 @@
+attributes #0 = { nounwind }
\ No newline at end of file

----------------
Add newline

http://reviews.llvm.org/D6579