[llvm] r223144 - R600/SI: Refactor AMDGPUAsmPrinter::EmitProgramInfoSI()
Tom Stellard
thomas.stellard at amd.com
Tue Dec 2 11:45:06 PST 2014
Author: tstellar
Date: Tue Dec 2 13:45:05 2014
New Revision: 223144
URL: http://llvm.org/viewvc/llvm-project?rev=223144&view=rev
Log:
R600/SI: Refactor AMDGPUAsmPrinter::EmitProgramInfoSI()
Modified:
llvm/trunk/lib/Target/R600/AMDGPUAsmPrinter.cpp
Modified: llvm/trunk/lib/Target/R600/AMDGPUAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUAsmPrinter.cpp?rev=223144&r1=223143&r2=223144&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/AMDGPUAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/R600/AMDGPUAsmPrinter.cpp Tue Dec 2 13:45:05 2014
@@ -358,19 +358,21 @@ void AMDGPUAsmPrinter::getSIProgramInfo(
ProgInfo.CodeLen = CodeSize;
}
+static unsigned getRsrcReg(unsigned ShaderType) {
+ switch (ShaderType) {
+ default: // Fall through
+ case ShaderType::COMPUTE: return R_00B848_COMPUTE_PGM_RSRC1;
+ case ShaderType::GEOMETRY: return R_00B228_SPI_SHADER_PGM_RSRC1_GS;
+ case ShaderType::PIXEL: return R_00B028_SPI_SHADER_PGM_RSRC1_PS;
+ case ShaderType::VERTEX: return R_00B128_SPI_SHADER_PGM_RSRC1_VS;
+ }
+}
+
void AMDGPUAsmPrinter::EmitProgramInfoSI(const MachineFunction &MF,
const SIProgramInfo &KernelInfo) {
const AMDGPUSubtarget &STM = TM.getSubtarget<AMDGPUSubtarget>();
const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
-
- unsigned RsrcReg;
- switch (MFI->getShaderType()) {
- default: // Fall through
- case ShaderType::COMPUTE: RsrcReg = R_00B848_COMPUTE_PGM_RSRC1; break;
- case ShaderType::GEOMETRY: RsrcReg = R_00B228_SPI_SHADER_PGM_RSRC1_GS; break;
- case ShaderType::PIXEL: RsrcReg = R_00B028_SPI_SHADER_PGM_RSRC1_PS; break;
- case ShaderType::VERTEX: RsrcReg = R_00B128_SPI_SHADER_PGM_RSRC1_VS; break;
- }
+ unsigned RsrcReg = getRsrcReg(MFI->getShaderType());
unsigned LDSAlignShift;
if (STM.getGeneration() < AMDGPUSubtarget::SEA_ISLANDS) {
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