[PATCH] [mips] Enable code generation for the MIPS II target.

[Vasileios Kalintiris]

>>! In D6150#4, @dsanders wrote:
> I understand you're testing with a qemu that has been patched to have a MIPS-II CPU definition. Are you planning to upstream that patch to qemu.org?

Hi Daniel, you are right. There wasn't any real CPU model for MIPS-II in Qemu so I added one based on the existing definition of the mips32r5-generic CPU.
I will send the patch for review to qemu sometime during this week.

http://reviews.llvm.org/D6150