[PATCH] [ARM] [CodeGen] Do not emit intermediate register for zero FP immediate

Sergey Dmitrouk sdmitrouk at accesssoftek.com
Thu Oct 23 03:25:04 PDT 2014


Ping. Also, did my reply to line comment was sent? It has a strange "Not Submitted Yet" label on it.

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Comment at: lib/Target/ARM/ARMISelLowering.cpp:3246
@@ +3245,3 @@
+    // Handle (ISD::BITCAST (ARMISD::VMOVIMM (ISD::TargetConstant 0)) MVT::f64)
+    // created by LowerConstantFP().
+    SDValue BitcastOp = Op->getOperand(0);
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rengolin wrote:
> I'd say this is a bit too specific on what LowerConstantFP does today, which may change. Wouldn't any fp bitcast work in this case, if the value being casted is zero?
Sure, it would work, but how to check node containing initial value for zero without going through all intermediate nodes? I was looking for a way to generalize this check, but didn't find it.

http://reviews.llvm.org/D5456






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