[PATCH] Implement restrictions on SP in register list on LDM, LDMIA, LDMFD for ARM v7m

[Jyoti Allur]

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Comment at: llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp:6000
@@ -5997,1 +5999,3 @@
                    "writeback register not allowed in register list");
+    if (Opcode == ARM::t2LDMIA_UPD) {
+      if (listContainsReg(Inst, 4, ARM::SP))
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t.p.northover wrote:
> This restriction seems to apply to all the Thumb2 instructions in this case, not just t2LDMIA_UPD (but watch out for the fallthrough from ARM above).
> 
> It also applies to the non-updating variants (you may have to add extra cases).
yes, this restriction does apply to all thumb2 instructions in this case, i was planning on adding multiple patches for each set of instructions Section wise as mentioned in the ARM ARM, if that's okay with you?.


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Comment at: llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp:6001
@@ +6000,3 @@
+    if (Opcode == ARM::t2LDMIA_UPD) {
+      if (listContainsReg(Inst, 4, ARM::SP))
+        return Error(Operands.back()->getStartLoc(),
----------------
t.p.northover wrote:
> The list doesn't start at operand 4 here, does it? It looks like it should be 3 again on my tests.
in some calls to checkLowRegisterList ( though this is a different function from listContainsReg, logic to read registers from list is same for both) operand 4 is used whenever a writeback expression exists in the instruction, since this case covered *_UPD case, 4 was used, correct me if my understanding is wrong.

http://reviews.llvm.org/D5827