[PATCH] Implement restrictions on SP in register list on LDM, LDMIA, LDMFD for ARM v7m

[Tim Northover]

Hi Jyoti,

Thanks very much for working on this (especially as it's one on my list to get around to). I think there are a few more cases to cover:

================
Comment at: llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp:6000
@@ -5997,1 +5999,3 @@
                    "writeback register not allowed in register list");
+    if (Opcode == ARM::t2LDMIA_UPD) {
+      if (listContainsReg(Inst, 4, ARM::SP))
----------------
This restriction seems to apply to all the Thumb2 instructions in this case, not just t2LDMIA_UPD (but watch out for the fallthrough from ARM above).

It also applies to the non-updating variants (you may have to add extra cases).

================
Comment at: llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp:6001
@@ +6000,3 @@
+    if (Opcode == ARM::t2LDMIA_UPD) {
+      if (listContainsReg(Inst, 4, ARM::SP))
+        return Error(Operands.back()->getStartLoc(),
----------------
The list doesn't start at operand 4 here, does it? It looks like it should be 3 again on my tests.

http://reviews.llvm.org/D5827