[llvm] r218204 - [x86] Remove some essentially lying comments from the v4f64 path of the

Chandler Carruth chandlerc at gmail.com
Sun Sep 21 03:27:14 PDT 2014


Author: chandlerc
Date: Sun Sep 21 05:27:14 2014
New Revision: 218204

URL: http://llvm.org/viewvc/llvm-project?rev=218204&view=rev
Log:
[x86] Remove some essentially lying comments from the v4f64 path of the
new vector shuffle lowering.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=218204&r1=218203&r2=218204&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sun Sep 21 05:27:14 2014
@@ -9199,10 +9199,6 @@ static SDValue lowerV4F64VectorShuffle(S
   ArrayRef<int> Mask = SVOp->getMask();
   assert(Mask.size() == 4 && "Unexpected mask size for v4 shuffle!");
 
-  // FIXME: If we have AVX2, we should delegate to generic code as crossing
-  // shuffles aren't a problem and FP and int have the same patterns.
-
-  // FIXME: We can handle these more cleverly than splitting for v4f64.
   if (is128BitLaneCrossingShuffleMask(MVT::v4f64, Mask))
     return splitAndLower256BitVectorShuffle(Op, V1, V2, Subtarget, DAG);
 
@@ -9221,8 +9217,6 @@ static SDValue lowerV4F64VectorShuffle(S
     return DAG.getNode(X86ISD::UNPCKL, DL, MVT::v4f64, V1, V2);
   if (isShuffleEquivalent(Mask, 1, 5, 3, 7))
     return DAG.getNode(X86ISD::UNPCKH, DL, MVT::v4f64, V1, V2);
-  // FIXME: It would be nice to find a way to get canonicalization to commute
-  // these patterns.
   if (isShuffleEquivalent(Mask, 4, 0, 6, 2))
     return DAG.getNode(X86ISD::UNPCKL, DL, MVT::v4f64, V2, V1);
   if (isShuffleEquivalent(Mask, 5, 1, 7, 3))





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