[llvm] r217248 - R600/SI: Use S_ADD_U32 and S_SUB_U32 for low half of 64-bit operations

Tom Stellard thomas.stellard at amd.com
Fri Sep 5 07:07:59 PDT 2014 

Author: tstellar
Date: Fri Sep  5 09:07:59 2014
New Revision: 217248

URL: http://llvm.org/viewvc/llvm-project?rev=217248&view=rev
Log:
R600/SI: Use S_ADD_U32 and S_SUB_U32 for low half of 64-bit operations

https://bugs.freedesktop.org/show_bug.cgi?id=83416

Modified:
    llvm/trunk/lib/Target/R600/AMDGPUISelDAGToDAG.cpp
    llvm/trunk/lib/Target/R600/SIInstrInfo.cpp
    llvm/trunk/lib/Target/R600/SIInstructions.td
    llvm/trunk/test/CodeGen/R600/add.ll
    llvm/trunk/test/CodeGen/R600/add_i64.ll
    llvm/trunk/test/CodeGen/R600/ssubo.ll
    llvm/trunk/test/CodeGen/R600/sub.ll
    llvm/trunk/test/CodeGen/R600/trunc.ll
    llvm/trunk/test/CodeGen/R600/uaddo.ll
    llvm/trunk/test/CodeGen/R600/usubo.ll

Modified: llvm/trunk/lib/Target/R600/AMDGPUISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUISelDAGToDAG.cpp?rev=217248&r1=217247&r2=217248&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/AMDGPUISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/R600/AMDGPUISelDAGToDAG.cpp Fri Sep  5 09:07:59 2014
@@ -701,7 +701,7 @@ SDNode *AMDGPUDAGToDAGISel::SelectADD_SU
   SDValue AddLoArgs[] = { SDValue(Lo0, 0), SDValue(Lo1, 0) };
 
 
-  unsigned Opc = IsAdd ? AMDGPU::S_ADD_I32 : AMDGPU::S_SUB_I32;
+  unsigned Opc = IsAdd ? AMDGPU::S_ADD_U32 : AMDGPU::S_SUB_U32;
   unsigned CarryOpc = IsAdd ? AMDGPU::S_ADDC_U32 : AMDGPU::S_SUBB_U32;
 
   if (!isCFDepth0()) {

Modified: llvm/trunk/lib/Target/R600/SIInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/SIInstrInfo.cpp?rev=217248&r1=217247&r2=217248&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/SIInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/R600/SIInstrInfo.cpp Fri Sep  5 09:07:59 2014
@@ -494,7 +494,7 @@ bool SIInstrInfo::expandPostRAPseudo(Mac
     BuildMI(MBB, MI, DL, get(AMDGPU::S_GETPC_B64), Reg);
 
     // Add 32-bit offset from this instruction to the start of the constant data.
-    BuildMI(MBB, MI, DL, get(AMDGPU::S_ADD_I32), RegLo)
+    BuildMI(MBB, MI, DL, get(AMDGPU::S_ADD_U32), RegLo)
             .addReg(RegLo)
             .addTargetIndex(AMDGPU::TI_CONSTDATA_START)
             .addReg(AMDGPU::SCC, RegState::Define | RegState::Implicit);
@@ -904,9 +904,11 @@ unsigned SIInstrInfo::getVALUOp(const Ma
   case AMDGPU::S_MOV_B32:
     return MI.getOperand(1).isReg() ?
            AMDGPU::COPY : AMDGPU::V_MOV_B32_e32;
-  case AMDGPU::S_ADD_I32: return AMDGPU::V_ADD_I32_e32;
+  case AMDGPU::S_ADD_I32:
+  case AMDGPU::S_ADD_U32: return AMDGPU::V_ADD_I32_e32;
   case AMDGPU::S_ADDC_U32: return AMDGPU::V_ADDC_U32_e32;
-  case AMDGPU::S_SUB_I32: return AMDGPU::V_SUB_I32_e32;
+  case AMDGPU::S_SUB_I32:
+  case AMDGPU::S_SUB_U32: return AMDGPU::V_SUB_I32_e32;
   case AMDGPU::S_SUBB_U32: return AMDGPU::V_SUBB_U32_e32;
   case AMDGPU::S_MUL_I32: return AMDGPU::V_MUL_LO_I32;
   case AMDGPU::S_AND_B32: return AMDGPU::V_AND_B32_e32;

Modified: llvm/trunk/lib/Target/R600/SIInstructions.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/SIInstructions.td?rev=217248&r1=217247&r2=217248&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/SIInstructions.td (original)
+++ llvm/trunk/lib/Target/R600/SIInstructions.td Fri Sep  5 09:07:59 2014
@@ -1858,11 +1858,11 @@ def : Pat <
 // SOP2 Patterns
 //===----------------------------------------------------------------------===//
 
-// V_ADD_I32_e32/S_ADD_I32 produces carry in VCC/SCC. For the vector
+// V_ADD_I32_e32/S_ADD_U32 produces carry in VCC/SCC. For the vector
 // case, the sgpr-copies pass will fix this to use the vector version.
 def : Pat <
   (i32 (addc i32:$src0, i32:$src1)),
-  (S_ADD_I32 $src0, $src1)
+  (S_ADD_U32 $src0, $src1)
 >;
 
 } // Predicates = [isSI, isCFDepth0]

Modified: llvm/trunk/test/CodeGen/R600/add.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/add.ll?rev=217248&r1=217247&r2=217248&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/add.ll (original)
+++ llvm/trunk/test/CodeGen/R600/add.ll Fri Sep  5 09:07:59 2014
@@ -117,7 +117,7 @@ entry:
 }
 
 ; FUNC-LABEL: @add64
-; SI-CHECK: S_ADD_I32
+; SI-CHECK: S_ADD_U32
 ; SI-CHECK: S_ADDC_U32
 define void @add64(i64 addrspace(1)* %out, i64 %a, i64 %b) {
 entry:

Modified: llvm/trunk/test/CodeGen/R600/add_i64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/add_i64.ll?rev=217248&r1=217247&r2=217248&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/add_i64.ll (original)
+++ llvm/trunk/test/CodeGen/R600/add_i64.ll Fri Sep  5 09:07:59 2014
@@ -43,9 +43,9 @@ define void @sgpr_operand_reversed(i64 a
 
 
 ; SI-LABEL: @test_v2i64_sreg:
-; SI: S_ADD_I32
+; SI: S_ADD_U32
 ; SI: S_ADDC_U32
-; SI: S_ADD_I32
+; SI: S_ADD_U32
 ; SI: S_ADDC_U32
 define void @test_v2i64_sreg(<2 x i64> addrspace(1)* noalias %out, <2 x i64> %a, <2 x i64> %b) {
   %result = add <2 x i64> %a, %b

Modified: llvm/trunk/test/CodeGen/R600/ssubo.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/ssubo.ll?rev=217248&r1=217247&r2=217248&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/ssubo.ll (original)
+++ llvm/trunk/test/CodeGen/R600/ssubo.ll Fri Sep  5 09:07:59 2014
@@ -38,7 +38,7 @@ define void @v_ssubo_i32(i32 addrspace(1
 }
 
 ; FUNC-LABEL: @s_ssubo_i64
-; SI: S_SUB_I32
+; SI: S_SUB_U32
 ; SI: S_SUBB_U32
 define void @s_ssubo_i64(i64 addrspace(1)* %out, i1 addrspace(1)* %carryout, i64 %a, i64 %b) nounwind {
   %ssub = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %a, i64 %b) nounwind

Modified: llvm/trunk/test/CodeGen/R600/sub.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/sub.ll?rev=217248&r1=217247&r2=217248&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/sub.ll (original)
+++ llvm/trunk/test/CodeGen/R600/sub.ll Fri Sep  5 09:07:59 2014
@@ -40,7 +40,7 @@ define void @test4(<4 x i32> addrspace(1
 }
 
 ; FUNC-LABEL: @s_sub_i64:
-; SI: S_SUB_I32
+; SI: S_SUB_U32
 ; SI: S_SUBB_U32
 
 ; EG-DAG: SETGE_UINT

Modified: llvm/trunk/test/CodeGen/R600/trunc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/trunc.ll?rev=217248&r1=217247&r2=217248&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/trunc.ll (original)
+++ llvm/trunk/test/CodeGen/R600/trunc.ll Fri Sep  5 09:07:59 2014
@@ -31,7 +31,7 @@ define void @trunc_load_shl_i64(i32 addr
 
 ; SI-LABEL: @trunc_shl_i64:
 ; SI: S_LOAD_DWORDX2 s{{\[}}[[LO_SREG:[0-9]+]]:{{[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0xd
-; SI: S_ADD_I32 s[[LO_SREG2:[0-9]+]], s[[LO_SREG]],
+; SI: S_ADD_U32 s[[LO_SREG2:[0-9]+]], s[[LO_SREG]],
 ; SI: S_ADDC_U32
 ; SI: S_LSHL_B64 s{{\[}}[[LO_SHL:[0-9]+]]:{{[0-9]+\]}}, s{{\[}}[[LO_SREG2]]:{{[0-9]+\]}}, 2
 ; SI: V_MOV_B32_e32 v[[LO_VREG:[0-9]+]], s[[LO_SHL]]

Modified: llvm/trunk/test/CodeGen/R600/uaddo.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/uaddo.ll?rev=217248&r1=217247&r2=217248&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/uaddo.ll (original)
+++ llvm/trunk/test/CodeGen/R600/uaddo.ll Fri Sep  5 09:07:59 2014
@@ -43,7 +43,7 @@ define void @v_uaddo_i32(i32 addrspace(1
 }
 
 ; FUNC-LABEL: @s_uaddo_i64
-; SI: S_ADD_I32
+; SI: S_ADD_U32
 ; SI: S_ADDC_U32
 define void @s_uaddo_i64(i64 addrspace(1)* %out, i1 addrspace(1)* %carryout, i64 %a, i64 %b) nounwind {
   %uadd = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %a, i64 %b) nounwind

Modified: llvm/trunk/test/CodeGen/R600/usubo.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/usubo.ll?rev=217248&r1=217247&r2=217248&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/usubo.ll (original)
+++ llvm/trunk/test/CodeGen/R600/usubo.ll Fri Sep  5 09:07:59 2014
@@ -40,7 +40,7 @@ define void @v_usubo_i32(i32 addrspace(1
 }
 
 ; FUNC-LABEL: @s_usubo_i64
-; SI: S_SUB_I32
+; SI: S_SUB_U32
 ; SI: S_SUBB_U32
 define void @s_usubo_i64(i64 addrspace(1)* %out, i1 addrspace(1)* %carryout, i64 %a, i64 %b) nounwind {
   %usub = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %a, i64 %b) nounwind

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