[llvm] r216725 - AArch64: skip select/setcc combine in complex case.
James Molloy
james at jamesmolloy.co.uk
Fri Aug 29 06:48:43 PDT 2014
Hi Tim,
This patch has just triggered regressions in emperor:
Value type is non-standard value, Other.
UNREACHABLE executed at
/home/llvm-test/slave/continuous/build/include/llvm/CodeGen/MachineValueType.h:368!
0 clang-3.6 0x00000000010559a5 llvm::sys::PrintStackTrace(_IO_FILE*)
+ 37
1 clang-3.6 0x0000000001055e63
2 libpthread.so.0 0x00007fc9e5978cb0
3 libc.so.6 0x00007fc9e4bb2425 gsignal + 53
4 libc.so.6 0x00007fc9e4bb5b8b abort + 379
5 clang-3.6 0x0000000001023de3 llvm::llvm_unreachable_internal(char
const*, char const*, unsigned int) + 451
6 clang-3.6 0x00000000006d9868
7 clang-3.6 0x00000000008477e5
llvm::AArch64TargetLowering::PerformDAGCombine(llvm::SDNode*,
llvm::TargetLowering::DAGCombinerInfo&) const + 6773
8 clang-3.6 0x00000000012a9bce
9 clang-3.6 0x00000000012a923c
llvm::SelectionDAG::Combine(llvm::CombineLevel, llvm::AliasAnalysis&,
llvm::CodeGenOpt::Level) + 2252
10 clang-3.6 0x00000000013b175e
llvm::SelectionDAGISel::CodeGenAndEmitDAG() + 910
11 clang-3.6 0x00000000013b0998
llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function const&) + 7112
12 clang-3.6 0x00000000013ae034
llvm::SelectionDAGISel::runOnMachineFunction(llvm::MachineFunction&) + 1364
13 clang-3.6 0x00000000007f364b
14 clang-3.6 0x0000000000b7402c
llvm::MachineFunctionPass::runOnFunction(llvm::Function&) + 124
15 clang-3.6 0x0000000000db397a
llvm::FPPassManager::runOnFunction(llvm::Function&) + 362
16 clang-3.6 0x0000000000db3c0b
llvm::FPPassManager::runOnModule(llvm::Module&) + 43
17 clang-3.6 0x0000000000db41a7
llvm::legacy::PassManagerImpl::run(llvm::Module&) + 999
18 clang-3.6 0x0000000001474c3d
clang::EmitBackendOutput(clang::DiagnosticsEngine&, clang::CodeGenOptions
const&, clang::TargetOptions const&, clang::LangOptions const&,
llvm::StringRef, llvm::Module*, clang::BackendAction, llvm::raw_ostream*) +
7197
19 clang-3.6 0x000000000146b45a
20 clang-3.6 0x00000000019fe5b3 clang::ParseAST(clang::Sema&, bool,
bool) + 467
21 clang-3.6 0x000000000146a19c clang::CodeGenAction::ExecuteAction()
+ 204
22 clang-3.6 0x00000000011df48e clang::FrontendAction::Execute() + 62
23 clang-3.6 0x00000000011b2b3c
clang::CompilerInstance::ExecuteAction(clang::FrontendAction&) + 892
24 clang-3.6 0x000000000125d58a
clang::ExecuteCompilerInvocation(clang::CompilerInstance*) + 3050
25 clang-3.6 0x000000000064dc99 cc1_main(llvm::ArrayRef<char const*>,
char const*, void*) + 569
26 clang-3.6 0x000000000064cb92 main + 12290
27 libc.so.6 0x00007fc9e4b9d76d __libc_start_main + 237
28 clang-3.6 0x0000000000649a69
Do you need a reproducer or is this enough for you to work out what's gone
on?
Cheers,
James
On 29 August 2014 14:05, Tim Northover <tnorthover at apple.com> wrote:
> Author: tnorthover
> Date: Fri Aug 29 08:05:18 2014
> New Revision: 216725
>
> URL: http://llvm.org/viewvc/llvm-project?rev=216725&view=rev
> Log:
> AArch64: skip select/setcc combine in complex case.
>
> In an llvm-stress generated test, we were trying to create a v0iN type and
> asserting when that failed. This case could probably be handled by the
> function, but not without added complexity and the situation it arises in
> is
> sufficiently odd that there's probably no benefit anyway.
>
> Should fix PR20775.
>
> Modified:
> llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
> llvm/trunk/test/CodeGen/AArch64/cond-sel.ll
>
> Modified: llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp?rev=216725&r1=216724&r2=216725&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp Fri Aug 29
> 08:05:18 2014
> @@ -7994,22 +7994,24 @@ static SDValue performVSelectCombine(SDN
> static SDValue performSelectCombine(SDNode *N, SelectionDAG &DAG) {
> SDValue N0 = N->getOperand(0);
> EVT ResVT = N->getValueType(0);
> + EVT SrcVT = N0.getOperand(0).getValueType();
> + int NumMaskElts = ResVT.getSizeInBits() / SrcVT.getSizeInBits();
>
> - if (!N->getOperand(1).getValueType().isVector())
> + // If NumMaskElts == 0, the comparison is larger than select result. The
> + // largest real NEON comparison is 64-bits per lane, which means the
> result is
> + // at most 32-bits and an illegal vector. Just bail out for now.
> + if (!ResVT.isVector() || NumMaskElts == 0)
> return SDValue();
>
> if (N0.getOpcode() != ISD::SETCC || N0.getValueType() != MVT::i1)
> return SDValue();
>
> - SDLoc DL(N0);
> -
> - EVT SrcVT = N0.getOperand(0).getValueType();
> - SrcVT = EVT::getVectorVT(*DAG.getContext(), SrcVT,
> - ResVT.getSizeInBits() / SrcVT.getSizeInBits());
> + SrcVT = EVT::getVectorVT(*DAG.getContext(), SrcVT, NumMaskElts);
> EVT CCVT = SrcVT.changeVectorElementTypeToInteger();
>
> // First perform a vector comparison, where lane 0 is the one we're
> interested
> // in.
> + SDLoc DL(N0);
> SDValue LHS =
> DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, SrcVT, N0.getOperand(0));
> SDValue RHS =
> @@ -8019,8 +8021,8 @@ static SDValue performSelectCombine(SDNo
> // Now duplicate the comparison mask we want across all other lanes.
> SmallVector<int, 8> DUPMask(CCVT.getVectorNumElements(), 0);
> SDValue Mask = DAG.getVectorShuffle(CCVT, DL, SetCC, SetCC,
> DUPMask.data());
> - Mask = DAG.getNode(ISD::BITCAST, DL,
> ResVT.changeVectorElementTypeToInteger(),
> - Mask);
> + Mask = DAG.getNode(ISD::BITCAST, DL,
> + ResVT.changeVectorElementTypeToInteger(), Mask);
>
> return DAG.getSelect(DL, ResVT, Mask, N->getOperand(1),
> N->getOperand(2));
> }
>
> Modified: llvm/trunk/test/CodeGen/AArch64/cond-sel.ll
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/cond-sel.ll?rev=216725&r1=216724&r2=216725&view=diff
>
> ==============================================================================
> --- llvm/trunk/test/CodeGen/AArch64/cond-sel.ll (original)
> +++ llvm/trunk/test/CodeGen/AArch64/cond-sel.ll Fri Aug 29 08:05:18 2014
> @@ -214,3 +214,13 @@ define void @test_csetm(i32 %lhs, i32 %r
> ret void
> ; CHECK: ret
> }
> +
> +define <1 x i1> @test_wide_comparison(i32 %in) {
> +; CHECK-LABEL: test_wide_comparison:
> +; CHECK: cmp w0, #1234
> +; CHECK: cset
> +
> + %tmp = icmp sgt i32 %in, 1234
> + %res = select i1 %tmp, <1 x i1> <i1 1>, <1 x i1> zeroinitializer
> + ret <1 x i1> %res
> +}
>
>
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