[PATCH] ARM: Fix TPsoft for Thumb mode

[Christian Pirker]

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Comment at: lib/Target/ARM/ARMExpandPseudoInsts.cpp:934
@@ +933,3 @@
+                       TII->get( ARM::tBL))
+               .addImm((unsigned)ARMCC::AL).addReg(0)
+               .addExternalSymbol("__aeabi_read_tp", 0);
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Renato Golin wrote:
> Is this to cope with IT blocks?
Yes, ARMCC::AL marks an unconditional branch.

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Comment at: lib/Target/ARM/ARMInstrInfo.td:5118
@@ +5117,3 @@
+// is defined in "ARMInstrThumb.td".
+let Predicates = [IsARM] in {
+  let isCall = 1,
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Renato Golin wrote:
> Is this really necessary? I'd have thought that everything in here is ARM anyway, plus the instruction is different (tTPsoft instead of TPsoft).
This pattern matches both in ARM and Thumb mode.
This predicate makes LLVM to match the tTPsoft pattern in Thumb mode.
I can change "PseudoInst" to "ARMPseudoInst" so that the predicate can be omitted, what you think?

http://reviews.llvm.org/D4230