[PATCH] [AArch64] Fix MC assertion failures with certain invalid instructions

[Artyom Skrobov]

Thank you Tim!

> For the inverted condition code patch, I think it'd be very good to
> comment what instruction that might be interpreted as. Also, if it's
> undefined it should have a "# CHECK: invalid instruction encoding"
> line associated (otherwise LLVM could start disassembling it, or any
> other instruction in that file, and we'd not notice). If not, it
> should be tested in a different file.

Does this make better sense?

Index: test/MC/Disassembler/AArch64/basic-a64-instructions.txt
===================================================================
--- test/MC/Disassembler/AArch64/basic-a64-instructions.txt	(revision 209749)
+++ test/MC/Disassembler/AArch64/basic-a64-instructions.txt	(working copy)
@@ -965,16 +965,18 @@
 
 # CHECK: cinv    w3, w5, gt
 # CHECK: cinv    wzr, w4, le
-# CHECK: csetm    w9, lt
+# CHECK: csetm   w9, lt
 # CHECK: cinv    x3, x5, gt
 # CHECK: cinv    xzr, x4, le
-# CHECK: csetm    x9, lt
+# CHECK: csetm   x9, lt
+# CHECK: cinv    x0, x0, nv
 0xa3 0xd0 0x85 0x5a
 0x9f 0xc0 0x84 0x5a
 0xe9 0xa3 0x9f 0x5a
 0xa3 0xd0 0x85 0xda
 0x9f 0xc0 0x84 0xda
 0xe9 0xa3 0x9f 0xda
+0x00 0xe0 0x80 0xda 
 
 # CHECK: cneg     w3, w5, gt
 # CHECK: cneg     wzr, w4, le


> The too few operands patch looks fine.

Committed as r209802