[llvm] r209423 - [mips] Change lwl and lwr in inlineasm_constraint.ll to lw

Daniel Sanders daniel.sanders at imgtec.com
Thu May 22 04:51:07 PDT 2014


Author: dsanders
Date: Thu May 22 06:51:06 2014
New Revision: 209423

URL: http://llvm.org/viewvc/llvm-project?rev=209423&view=rev
Log:
[mips] Change lwl and lwr in inlineasm_constraint.ll to lw

Summary:
lwl and lwr are not available in MIPS32r6/MIPS64r6. The purpose of the test
is to check that the '$1' expands to '0($x)' rather than to test something related
to the lwl or lwr instructions so we can simply switch to lw.

Depends on D3842

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3844

Modified:
    llvm/trunk/test/CodeGen/Mips/inlineasm_constraint.ll

Modified: llvm/trunk/test/CodeGen/Mips/inlineasm_constraint.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/inlineasm_constraint.ll?rev=209423&r1=209422&r2=209423&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/inlineasm_constraint.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/inlineasm_constraint.ll Thu May 22 06:51:06 2014
@@ -54,10 +54,10 @@ entry:
 ; Now R Which takes the address of c
   %c = alloca i32, align 4
   store i32 -4469539, i32* %c, align 4
-  %8 = call i32 asm sideeffect "lwl $0, 1 + $1\0A\09lwr $0, 2 + $1\0A\09", "=r,*R"(i32* %c) #1
+  %8 = call i32 asm sideeffect "lw $0, 1 + $1\0A\09lw $0, 2 + $1\0A\09", "=r,*R"(i32* %c) #1
 ; CHECK: #APP
-; CHECK: lwl ${{[0-9]+}}, 1 + 0(${{[0-9]+}})
-; CHECK: lwr ${{[0-9]+}}, 2 + 0(${{[0-9]+}})
+; CHECK: lw ${{[0-9]+}}, 1 + 0(${{[0-9]+}})
+; CHECK: lw ${{[0-9]+}}, 2 + 0(${{[0-9]+}})
 ; CHECK: #NO_APP	
 
   ret i32 0





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