[llvm] r209409 - ARM64: assert if we see i64 -> i64 extend in the DAG.

[Tim Northover]

Author: tnorthover
Date: Thu May 22 02:41:37 2014
New Revision: 209409

URL: http://llvm.org/viewvc/llvm-project?rev=209409&view=rev
Log:
ARM64: assert if we see i64 -> i64 extend in the DAG.

Should be no change in behaviour, but it makes the intended
functionality a bit clearer and means we only have to reason about
real extend operations.

Modified:
    llvm/trunk/lib/Target/ARM64/ARM64ISelDAGToDAG.cpp

Modified: llvm/trunk/lib/Target/ARM64/ARM64ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM64/ARM64ISelDAGToDAG.cpp?rev=209409&r1=209408&r2=209409&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM64/ARM64ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/ARM64/ARM64ISelDAGToDAG.cpp Thu May 22 02:41:37 2014
@@ -369,8 +369,7 @@ getExtendTypeForNode(SDValue N, bool IsL
       return ARM64_AM::SXTH;
     else if (SrcVT == MVT::i32)
       return ARM64_AM::SXTW;
-    else if (SrcVT == MVT::i64)
-      return ARM64_AM::SXTX;
+    assert(SrcVT != MVT::i64 && "extend from 64-bits?");
 
     return ARM64_AM::InvalidShiftExtend;
   } else if (N.getOpcode() == ISD::ZERO_EXTEND ||
@@ -382,8 +381,7 @@ getExtendTypeForNode(SDValue N, bool IsL
       return ARM64_AM::UXTH;
     else if (SrcVT == MVT::i32)
       return ARM64_AM::UXTW;
-    else if (SrcVT == MVT::i64)
-      return ARM64_AM::UXTX;
+    assert(SrcVT != MVT::i64 && "extend from 64-bits?");
 
     return ARM64_AM::InvalidShiftExtend;
   } else if (N.getOpcode() == ISD::AND) {