[PATCH][DAGCombiner] Split up an indexed load if only the base pointer value is live

Adam Nemet anemet at apple.com
Mon May 12 11:59:58 PDT 2014


Ping^2

On May 5, 2014, at 11:42 AM, Adam Nemet <anemet at apple.com> wrote:

> Ping.
> 
> +          for (SDNode *U : N->uses())
> +            AddToWorkList(U);
> 
> For the review, please consider this written as: AddUsersToWorkList(N)
> 
> On Apr 24, 2014, at 5:09 PM, Adam Nemet <anemet at apple.com> wrote:
> 
>> Right now the load may not get DCE'd because of the side-effect of updating
>> the base pointer.
>> 
>> This can happen if we lower a read-modify-write of an illegal larger type
>> (e.g. i48) such that the modification only affects one of the subparts (the
>> lower i32 part but not the higher i16 part).  See the testcase.
>> 
>> In order to spot the dead load we need to revisit it when SimplifyDemandedBits
>> decided that the value of the load is masked off.  This is the
>> CommitTargetLoweringOpt piece.
>> 
>> I checked compile time with ARM64 by sending SPEC bitcode files through llc.
>> No measurable change.
>> 
>> Fixes <rdar://problem/16031651>
>> 
>> Adam
>> 
-------------- next part --------------
A non-text attachment was scrubbed...
Name: DAGCombiner-Split-up-an-indexed-load-if-only-the-bas.patch
Type: application/octet-stream
Size: 4614 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20140512/3e8b33d2/attachment.obj>
-------------- next part --------------
>> 
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
> 
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits



More information about the llvm-commits mailing list