[compiler-rt] r208578 - [CompilerRT] use .p2align, .balign instead of .align
Saleem Abdulrasool
compnerd at compnerd.org
Mon May 12 08:23:38 PDT 2014
Author: compnerd
Date: Mon May 12 10:23:37 2014
New Revision: 208578
URL: http://llvm.org/viewvc/llvm-project?rev=208578&view=rev
Log:
[CompilerRT] use .p2align, .balign instead of .align
The .align statements in ARM assembly routines is actually meant to be a power
of 2 alignment (e.g. .align 2 == 4 byte alignment, not 2). Switch to using
.p2align. .p2align is guaranteed to be a power-of-two alignment always and much
more explicit.
The .align in the case of x86_64 is byte alignment, use .balign instead of
.align.
Modified:
compiler-rt/trunk/lib/builtins/arm/adddf3vfp.S
compiler-rt/trunk/lib/builtins/arm/addsf3vfp.S
compiler-rt/trunk/lib/builtins/arm/aeabi_dcmp.S
compiler-rt/trunk/lib/builtins/arm/aeabi_fcmp.S
compiler-rt/trunk/lib/builtins/arm/aeabi_idivmod.S
compiler-rt/trunk/lib/builtins/arm/aeabi_ldivmod.S
compiler-rt/trunk/lib/builtins/arm/aeabi_memcmp.S
compiler-rt/trunk/lib/builtins/arm/aeabi_memcpy.S
compiler-rt/trunk/lib/builtins/arm/aeabi_memmove.S
compiler-rt/trunk/lib/builtins/arm/aeabi_memset.S
compiler-rt/trunk/lib/builtins/arm/aeabi_uidivmod.S
compiler-rt/trunk/lib/builtins/arm/aeabi_uldivmod.S
compiler-rt/trunk/lib/builtins/arm/bswapdi2.S
compiler-rt/trunk/lib/builtins/arm/bswapsi2.S
compiler-rt/trunk/lib/builtins/arm/clzdi2.S
compiler-rt/trunk/lib/builtins/arm/clzsi2.S
compiler-rt/trunk/lib/builtins/arm/comparesf2.S
compiler-rt/trunk/lib/builtins/arm/divdf3vfp.S
compiler-rt/trunk/lib/builtins/arm/divmodsi4.S
compiler-rt/trunk/lib/builtins/arm/divsf3vfp.S
compiler-rt/trunk/lib/builtins/arm/divsi3.S
compiler-rt/trunk/lib/builtins/arm/eqdf2vfp.S
compiler-rt/trunk/lib/builtins/arm/eqsf2vfp.S
compiler-rt/trunk/lib/builtins/arm/extendsfdf2vfp.S
compiler-rt/trunk/lib/builtins/arm/fixdfsivfp.S
compiler-rt/trunk/lib/builtins/arm/fixsfsivfp.S
compiler-rt/trunk/lib/builtins/arm/fixunsdfsivfp.S
compiler-rt/trunk/lib/builtins/arm/fixunssfsivfp.S
compiler-rt/trunk/lib/builtins/arm/floatsidfvfp.S
compiler-rt/trunk/lib/builtins/arm/floatsisfvfp.S
compiler-rt/trunk/lib/builtins/arm/floatunssidfvfp.S
compiler-rt/trunk/lib/builtins/arm/floatunssisfvfp.S
compiler-rt/trunk/lib/builtins/arm/gedf2vfp.S
compiler-rt/trunk/lib/builtins/arm/gesf2vfp.S
compiler-rt/trunk/lib/builtins/arm/gtdf2vfp.S
compiler-rt/trunk/lib/builtins/arm/gtsf2vfp.S
compiler-rt/trunk/lib/builtins/arm/ledf2vfp.S
compiler-rt/trunk/lib/builtins/arm/lesf2vfp.S
compiler-rt/trunk/lib/builtins/arm/ltdf2vfp.S
compiler-rt/trunk/lib/builtins/arm/ltsf2vfp.S
compiler-rt/trunk/lib/builtins/arm/modsi3.S
compiler-rt/trunk/lib/builtins/arm/muldf3vfp.S
compiler-rt/trunk/lib/builtins/arm/mulsf3vfp.S
compiler-rt/trunk/lib/builtins/arm/nedf2vfp.S
compiler-rt/trunk/lib/builtins/arm/negdf2vfp.S
compiler-rt/trunk/lib/builtins/arm/negsf2vfp.S
compiler-rt/trunk/lib/builtins/arm/nesf2vfp.S
compiler-rt/trunk/lib/builtins/arm/restore_vfp_d8_d15_regs.S
compiler-rt/trunk/lib/builtins/arm/save_vfp_d8_d15_regs.S
compiler-rt/trunk/lib/builtins/arm/subdf3vfp.S
compiler-rt/trunk/lib/builtins/arm/subsf3vfp.S
compiler-rt/trunk/lib/builtins/arm/switch16.S
compiler-rt/trunk/lib/builtins/arm/switch32.S
compiler-rt/trunk/lib/builtins/arm/switch8.S
compiler-rt/trunk/lib/builtins/arm/switchu8.S
compiler-rt/trunk/lib/builtins/arm/sync-ops.h
compiler-rt/trunk/lib/builtins/arm/sync_synchronize.S
compiler-rt/trunk/lib/builtins/arm/truncdfsf2vfp.S
compiler-rt/trunk/lib/builtins/arm/unorddf2vfp.S
compiler-rt/trunk/lib/builtins/arm/unordsf2vfp.S
compiler-rt/trunk/lib/builtins/i386/ashldi3.S
compiler-rt/trunk/lib/builtins/i386/ashrdi3.S
compiler-rt/trunk/lib/builtins/i386/divdi3.S
compiler-rt/trunk/lib/builtins/i386/floatdidf.S
compiler-rt/trunk/lib/builtins/i386/floatdisf.S
compiler-rt/trunk/lib/builtins/i386/floatdixf.S
compiler-rt/trunk/lib/builtins/i386/floatundidf.S
compiler-rt/trunk/lib/builtins/i386/floatundisf.S
compiler-rt/trunk/lib/builtins/i386/floatundixf.S
compiler-rt/trunk/lib/builtins/i386/lshrdi3.S
compiler-rt/trunk/lib/builtins/i386/moddi3.S
compiler-rt/trunk/lib/builtins/i386/muldi3.S
compiler-rt/trunk/lib/builtins/i386/udivdi3.S
compiler-rt/trunk/lib/builtins/i386/umoddi3.S
compiler-rt/trunk/lib/builtins/x86_64/floatundidf.S
compiler-rt/trunk/lib/builtins/x86_64/floatundisf.S
compiler-rt/trunk/lib/builtins/x86_64/floatundixf.S
Modified: compiler-rt/trunk/lib/builtins/arm/adddf3vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/adddf3vfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/adddf3vfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/adddf3vfp.S Mon May 12 10:23:37 2014
@@ -16,7 +16,7 @@
// calling convention where double arguments are passsed in GPR pairs
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__adddf3vfp)
vmov d6, r0, r1 // move first param from r0/r1 pair into d6
vmov d7, r2, r3 // move second param from r2/r3 pair into d7
Modified: compiler-rt/trunk/lib/builtins/arm/addsf3vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/addsf3vfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/addsf3vfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/addsf3vfp.S Mon May 12 10:23:37 2014
@@ -16,7 +16,7 @@
// calling convention where single arguments are passsed in GPRs
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__addsf3vfp)
vmov s14, r0 // move first param from r0 into float register
vmov s15, r1 // move second param from r1 into float register
Modified: compiler-rt/trunk/lib/builtins/arm/aeabi_dcmp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/aeabi_dcmp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/aeabi_dcmp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/aeabi_dcmp.S Mon May 12 10:23:37 2014
@@ -20,7 +20,7 @@
#define DEFINE_AEABI_DCMP(cond) \
.syntax unified SEPARATOR \
- .align 2 SEPARATOR \
+ .p2align 2 SEPARATOR \
DEFINE_COMPILERRT_FUNCTION(__aeabi_dcmp ## cond) \
push { r4, lr } SEPARATOR \
bl SYMBOL_NAME(__ ## cond ## df2) SEPARATOR \
Modified: compiler-rt/trunk/lib/builtins/arm/aeabi_fcmp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/aeabi_fcmp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/aeabi_fcmp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/aeabi_fcmp.S Mon May 12 10:23:37 2014
@@ -20,7 +20,7 @@
#define DEFINE_AEABI_FCMP(cond) \
.syntax unified SEPARATOR \
- .align 2 SEPARATOR \
+ .p2align 2 SEPARATOR \
DEFINE_COMPILERRT_FUNCTION(__aeabi_fcmp ## cond) \
push { r4, lr } SEPARATOR \
bl SYMBOL_NAME(__ ## cond ## sf2) SEPARATOR \
Modified: compiler-rt/trunk/lib/builtins/arm/aeabi_idivmod.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/aeabi_idivmod.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/aeabi_idivmod.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/aeabi_idivmod.S Mon May 12 10:23:37 2014
@@ -16,7 +16,7 @@
// }
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__aeabi_idivmod)
push { lr }
sub sp, sp, #4
Modified: compiler-rt/trunk/lib/builtins/arm/aeabi_ldivmod.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/aeabi_ldivmod.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/aeabi_ldivmod.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/aeabi_ldivmod.S Mon May 12 10:23:37 2014
@@ -17,7 +17,7 @@
// }
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__aeabi_ldivmod)
push {r11, lr}
sub sp, sp, #16
Modified: compiler-rt/trunk/lib/builtins/arm/aeabi_memcmp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/aeabi_memcmp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/aeabi_memcmp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/aeabi_memcmp.S Mon May 12 10:23:37 2014
@@ -11,7 +11,7 @@
// void __aeabi_memcmp(void *dest, void *src, size_t n) { memcmp(dest, src, n); }
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__aeabi_memcmp)
b memcmp
END_COMPILERRT_FUNCTION(__aeabi_memcmp)
Modified: compiler-rt/trunk/lib/builtins/arm/aeabi_memcpy.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/aeabi_memcpy.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/aeabi_memcpy.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/aeabi_memcpy.S Mon May 12 10:23:37 2014
@@ -11,7 +11,7 @@
// void __aeabi_memcpy(void *dest, void *src, size_t n) { memcpy(dest, src, n); }
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__aeabi_memcpy)
b memcpy
END_COMPILERRT_FUNCTION(__aeabi_memcpy)
Modified: compiler-rt/trunk/lib/builtins/arm/aeabi_memmove.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/aeabi_memmove.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/aeabi_memmove.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/aeabi_memmove.S Mon May 12 10:23:37 2014
@@ -11,7 +11,7 @@
// void __aeabi_memmove(void *dest, void *src, size_t n) { memmove(dest, src, n); }
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__aeabi_memmove)
b memmove
END_COMPILERRT_FUNCTION(__aeabi_memmove)
Modified: compiler-rt/trunk/lib/builtins/arm/aeabi_memset.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/aeabi_memset.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/aeabi_memset.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/aeabi_memset.S Mon May 12 10:23:37 2014
@@ -12,7 +12,7 @@
// void __aeabi_memset(void *dest, size_t n, int c) { memset(dest, c, n); }
// void __aeabi_memclr(void *dest, size_t n) { __aeabi_memset(dest, n, 0); }
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__aeabi_memset)
mov r3, r1
mov r1, r2
Modified: compiler-rt/trunk/lib/builtins/arm/aeabi_uidivmod.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/aeabi_uidivmod.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/aeabi_uidivmod.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/aeabi_uidivmod.S Mon May 12 10:23:37 2014
@@ -17,7 +17,7 @@
// }
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__aeabi_uidivmod)
push { lr }
sub sp, sp, #4
Modified: compiler-rt/trunk/lib/builtins/arm/aeabi_uldivmod.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/aeabi_uldivmod.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/aeabi_uldivmod.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/aeabi_uldivmod.S Mon May 12 10:23:37 2014
@@ -17,7 +17,7 @@
// }
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__aeabi_uldivmod)
push {r11, lr}
sub sp, sp, #16
Modified: compiler-rt/trunk/lib/builtins/arm/bswapdi2.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/bswapdi2.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/bswapdi2.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/bswapdi2.S Mon May 12 10:23:37 2014
@@ -14,7 +14,7 @@
//
// Reverse all the bytes in a 64-bit integer.
//
-.align 2
+.p2align 2
DEFINE_COMPILERRT_FUNCTION(__bswapdi2)
#if __ARM_ARCH < 6
// before armv6 does not have "rev" instruction
Modified: compiler-rt/trunk/lib/builtins/arm/bswapsi2.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/bswapsi2.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/bswapsi2.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/bswapsi2.S Mon May 12 10:23:37 2014
@@ -14,7 +14,7 @@
//
// Reverse all the bytes in a 32-bit integer.
//
-.align 2
+.p2align 2
DEFINE_COMPILERRT_FUNCTION(__bswapsi2)
#if __ARM_ARCH < 6
// before armv6 does not have "rev" instruction
Modified: compiler-rt/trunk/lib/builtins/arm/clzdi2.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/clzdi2.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/clzdi2.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/clzdi2.S Mon May 12 10:23:37 2014
@@ -16,7 +16,7 @@
.syntax unified
.text
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__clzdi2)
#ifdef __ARM_FEATURE_CLZ
#ifdef __ARMEB__
Modified: compiler-rt/trunk/lib/builtins/arm/clzsi2.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/clzsi2.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/clzsi2.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/clzsi2.S Mon May 12 10:23:37 2014
@@ -16,7 +16,7 @@
.syntax unified
.text
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__clzsi2)
#ifdef __ARM_FEATURE_CLZ
clz r0, r0
Modified: compiler-rt/trunk/lib/builtins/arm/comparesf2.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/comparesf2.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/comparesf2.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/comparesf2.S Mon May 12 10:23:37 2014
@@ -40,7 +40,7 @@
#include "../assembly.h"
.syntax unified
-.align 2
+.p2align 2
DEFINE_COMPILERRT_FUNCTION(__eqsf2)
// Make copies of a and b with the sign bit shifted off the top. These will
// be used to detect zeros and NaNs.
@@ -105,7 +105,7 @@ DEFINE_COMPILERRT_FUNCTION_ALIAS(__lesf2
DEFINE_COMPILERRT_FUNCTION_ALIAS(__ltsf2, __eqsf2)
DEFINE_COMPILERRT_FUNCTION_ALIAS(__nesf2, __eqsf2)
-.align 2
+.p2align 2
DEFINE_COMPILERRT_FUNCTION(__gtsf2)
// Identical to the preceeding except in that we return -1 for NaN values.
// Given that the two paths share so much code, one might be tempted to
@@ -132,7 +132,7 @@ DEFINE_COMPILERRT_FUNCTION(__gtsf2)
END_COMPILERRT_FUNCTION(__gtsf2)
DEFINE_COMPILERRT_FUNCTION_ALIAS(__gesf2, __gtsf2)
-.align 2
+.p2align 2
DEFINE_COMPILERRT_FUNCTION(__unordsf2)
// Return 1 for NaN values, 0 otherwise.
mov r2, r0, lsl #1
Modified: compiler-rt/trunk/lib/builtins/arm/divdf3vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/divdf3vfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/divdf3vfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/divdf3vfp.S Mon May 12 10:23:37 2014
@@ -16,7 +16,7 @@
// calling convention where double arguments are passsed in GPR pairs
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__divdf3vfp)
vmov d6, r0, r1 // move first param from r0/r1 pair into d6
vmov d7, r2, r3 // move second param from r2/r3 pair into d7
Modified: compiler-rt/trunk/lib/builtins/arm/divmodsi4.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/divmodsi4.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/divmodsi4.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/divmodsi4.S Mon May 12 10:23:37 2014
@@ -22,7 +22,7 @@
pop {r4-r7, pc}
.syntax unified
-.align 3
+.p2align 3
DEFINE_COMPILERRT_FUNCTION(__divmodsi4)
#if __ARM_ARCH_EXT_IDIV__
tst r1, r1
Modified: compiler-rt/trunk/lib/builtins/arm/divsf3vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/divsf3vfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/divsf3vfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/divsf3vfp.S Mon May 12 10:23:37 2014
@@ -16,7 +16,7 @@
// calling convention where single arguments are passsed like 32-bit ints.
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__divsf3vfp)
vmov s14, r0 // move first param from r0 into float register
vmov s15, r1 // move second param from r1 into float register
Modified: compiler-rt/trunk/lib/builtins/arm/divsi3.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/divsi3.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/divsi3.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/divsi3.S Mon May 12 10:23:37 2014
@@ -21,7 +21,7 @@
pop {r4, r7, pc}
.syntax unified
-.align 3
+.p2align 3
// Ok, APCS and AAPCS agree on 32 bit args, so it's safe to use the same routine.
DEFINE_AEABI_FUNCTION_ALIAS(__aeabi_idiv, __divsi3)
DEFINE_COMPILERRT_FUNCTION(__divsi3)
Modified: compiler-rt/trunk/lib/builtins/arm/eqdf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/eqdf2vfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/eqdf2vfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/eqdf2vfp.S Mon May 12 10:23:37 2014
@@ -17,7 +17,7 @@
// like in GPR pairs.
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__eqdf2vfp)
vmov d6, r0, r1 // load r0/r1 pair in double register
vmov d7, r2, r3 // load r2/r3 pair in double register
Modified: compiler-rt/trunk/lib/builtins/arm/eqsf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/eqsf2vfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/eqsf2vfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/eqsf2vfp.S Mon May 12 10:23:37 2014
@@ -17,7 +17,7 @@
// like 32-bit ints
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__eqsf2vfp)
vmov s14, r0 // move from GPR 0 to float register
vmov s15, r1 // move from GPR 1 to float register
Modified: compiler-rt/trunk/lib/builtins/arm/extendsfdf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/extendsfdf2vfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/extendsfdf2vfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/extendsfdf2vfp.S Mon May 12 10:23:37 2014
@@ -17,7 +17,7 @@
// passed in a GPR and a double precision result is returned in R0/R1 pair.
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__extendsfdf2vfp)
vmov s15, r0 // load float register from R0
vcvt.f64.f32 d7, s15 // convert single to double
Modified: compiler-rt/trunk/lib/builtins/arm/fixdfsivfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/fixdfsivfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/fixdfsivfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/fixdfsivfp.S Mon May 12 10:23:37 2014
@@ -17,7 +17,7 @@
// passed in GPR register pair.
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__fixdfsivfp)
vmov d7, r0, r1 // load double register from R0/R1
vcvt.s32.f64 s15, d7 // convert double to 32-bit int into s15
Modified: compiler-rt/trunk/lib/builtins/arm/fixsfsivfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/fixsfsivfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/fixsfsivfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/fixsfsivfp.S Mon May 12 10:23:37 2014
@@ -17,7 +17,7 @@
// passed in a GPR..
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__fixsfsivfp)
vmov s15, r0 // load float register from R0
vcvt.s32.f32 s15, s15 // convert single to 32-bit int into s15
Modified: compiler-rt/trunk/lib/builtins/arm/fixunsdfsivfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/fixunsdfsivfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/fixunsdfsivfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/fixunsdfsivfp.S Mon May 12 10:23:37 2014
@@ -18,7 +18,7 @@
// passed in GPR register pair.
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__fixunsdfsivfp)
vmov d7, r0, r1 // load double register from R0/R1
vcvt.u32.f64 s15, d7 // convert double to 32-bit int into s15
Modified: compiler-rt/trunk/lib/builtins/arm/fixunssfsivfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/fixunssfsivfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/fixunssfsivfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/fixunssfsivfp.S Mon May 12 10:23:37 2014
@@ -18,7 +18,7 @@
// passed in a GPR..
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__fixunssfsivfp)
vmov s15, r0 // load float register from R0
vcvt.u32.f32 s15, s15 // convert single to 32-bit unsigned into s15
Modified: compiler-rt/trunk/lib/builtins/arm/floatsidfvfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/floatsidfvfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/floatsidfvfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/floatsidfvfp.S Mon May 12 10:23:37 2014
@@ -17,7 +17,7 @@
// return in GPR register pair.
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__floatsidfvfp)
vmov s15, r0 // move int to float register s15
vcvt.f64.s32 d7, s15 // convert 32-bit int in s15 to double in d7
Modified: compiler-rt/trunk/lib/builtins/arm/floatsisfvfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/floatsisfvfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/floatsisfvfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/floatsisfvfp.S Mon May 12 10:23:37 2014
@@ -17,7 +17,7 @@
// return in a GPR..
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__floatsisfvfp)
vmov s15, r0 // move int to float register s15
vcvt.f32.s32 s15, s15 // convert 32-bit int in s15 to float in s15
Modified: compiler-rt/trunk/lib/builtins/arm/floatunssidfvfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/floatunssidfvfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/floatunssidfvfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/floatunssidfvfp.S Mon May 12 10:23:37 2014
@@ -17,7 +17,7 @@
// return in GPR register pair.
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__floatunssidfvfp)
vmov s15, r0 // move int to float register s15
vcvt.f64.u32 d7, s15 // convert 32-bit int in s15 to double in d7
Modified: compiler-rt/trunk/lib/builtins/arm/floatunssisfvfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/floatunssisfvfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/floatunssisfvfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/floatunssisfvfp.S Mon May 12 10:23:37 2014
@@ -17,7 +17,7 @@
// return in a GPR..
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__floatunssisfvfp)
vmov s15, r0 // move int to float register s15
vcvt.f32.u32 s15, s15 // convert 32-bit int in s15 to float in s15
Modified: compiler-rt/trunk/lib/builtins/arm/gedf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/gedf2vfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/gedf2vfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/gedf2vfp.S Mon May 12 10:23:37 2014
@@ -17,7 +17,7 @@
// like in GPR pairs.
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__gedf2vfp)
vmov d6, r0, r1 // load r0/r1 pair in double register
vmov d7, r2, r3 // load r2/r3 pair in double register
Modified: compiler-rt/trunk/lib/builtins/arm/gesf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/gesf2vfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/gesf2vfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/gesf2vfp.S Mon May 12 10:23:37 2014
@@ -17,7 +17,7 @@
// like 32-bit ints
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__gesf2vfp)
vmov s14, r0 // move from GPR 0 to float register
vmov s15, r1 // move from GPR 1 to float register
Modified: compiler-rt/trunk/lib/builtins/arm/gtdf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/gtdf2vfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/gtdf2vfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/gtdf2vfp.S Mon May 12 10:23:37 2014
@@ -17,7 +17,7 @@
// like in GPR pairs.
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__gtdf2vfp)
vmov d6, r0, r1 // load r0/r1 pair in double register
vmov d7, r2, r3 // load r2/r3 pair in double register
Modified: compiler-rt/trunk/lib/builtins/arm/gtsf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/gtsf2vfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/gtsf2vfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/gtsf2vfp.S Mon May 12 10:23:37 2014
@@ -17,7 +17,7 @@
// like 32-bit ints
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__gtsf2vfp)
vmov s14, r0 // move from GPR 0 to float register
vmov s15, r1 // move from GPR 1 to float register
Modified: compiler-rt/trunk/lib/builtins/arm/ledf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/ledf2vfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/ledf2vfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/ledf2vfp.S Mon May 12 10:23:37 2014
@@ -17,7 +17,7 @@
// like in GPR pairs.
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__ledf2vfp)
vmov d6, r0, r1 // load r0/r1 pair in double register
vmov d7, r2, r3 // load r2/r3 pair in double register
Modified: compiler-rt/trunk/lib/builtins/arm/lesf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/lesf2vfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/lesf2vfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/lesf2vfp.S Mon May 12 10:23:37 2014
@@ -17,7 +17,7 @@
// like 32-bit ints
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__lesf2vfp)
vmov s14, r0 // move from GPR 0 to float register
vmov s15, r1 // move from GPR 1 to float register
Modified: compiler-rt/trunk/lib/builtins/arm/ltdf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/ltdf2vfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/ltdf2vfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/ltdf2vfp.S Mon May 12 10:23:37 2014
@@ -17,7 +17,7 @@
// like in GPR pairs.
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__ltdf2vfp)
vmov d6, r0, r1 // load r0/r1 pair in double register
vmov d7, r2, r3 // load r2/r3 pair in double register
Modified: compiler-rt/trunk/lib/builtins/arm/ltsf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/ltsf2vfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/ltsf2vfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/ltsf2vfp.S Mon May 12 10:23:37 2014
@@ -17,7 +17,7 @@
// like 32-bit ints
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__ltsf2vfp)
vmov s14, r0 // move from GPR 0 to float register
vmov s15, r1 // move from GPR 1 to float register
Modified: compiler-rt/trunk/lib/builtins/arm/modsi3.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/modsi3.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/modsi3.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/modsi3.S Mon May 12 10:23:37 2014
@@ -21,7 +21,7 @@
pop {r4, r7, pc}
.syntax unified
-.align 3
+.p2align 3
DEFINE_COMPILERRT_FUNCTION(__modsi3)
#if __ARM_ARCH_EXT_IDIV__
tst r1, r1
Modified: compiler-rt/trunk/lib/builtins/arm/muldf3vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/muldf3vfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/muldf3vfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/muldf3vfp.S Mon May 12 10:23:37 2014
@@ -16,7 +16,7 @@
// calling convention where double arguments are passsed in GPR pairs
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__muldf3vfp)
vmov d6, r0, r1 // move first param from r0/r1 pair into d6
vmov d7, r2, r3 // move second param from r2/r3 pair into d7
Modified: compiler-rt/trunk/lib/builtins/arm/mulsf3vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/mulsf3vfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/mulsf3vfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/mulsf3vfp.S Mon May 12 10:23:37 2014
@@ -16,7 +16,7 @@
// calling convention where single arguments are passsed like 32-bit ints.
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__mulsf3vfp)
vmov s14, r0 // move first param from r0 into float register
vmov s15, r1 // move second param from r1 into float register
Modified: compiler-rt/trunk/lib/builtins/arm/nedf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/nedf2vfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/nedf2vfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/nedf2vfp.S Mon May 12 10:23:37 2014
@@ -17,7 +17,7 @@
// like in GPR pairs.
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__nedf2vfp)
vmov d6, r0, r1 // load r0/r1 pair in double register
vmov d7, r2, r3 // load r2/r3 pair in double register
Modified: compiler-rt/trunk/lib/builtins/arm/negdf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/negdf2vfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/negdf2vfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/negdf2vfp.S Mon May 12 10:23:37 2014
@@ -16,7 +16,7 @@
// Darwin calling convention where double arguments are passsed in GPR pairs.
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__negdf2vfp)
eor r1, r1, #-2147483648 // flip sign bit on double in r0/r1 pair
bx lr
Modified: compiler-rt/trunk/lib/builtins/arm/negsf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/negsf2vfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/negsf2vfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/negsf2vfp.S Mon May 12 10:23:37 2014
@@ -16,7 +16,7 @@
// Darwin calling convention where single arguments are passsed like 32-bit ints
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__negsf2vfp)
eor r0, r0, #-2147483648 // flip sign bit on float in r0
bx lr
Modified: compiler-rt/trunk/lib/builtins/arm/nesf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/nesf2vfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/nesf2vfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/nesf2vfp.S Mon May 12 10:23:37 2014
@@ -17,7 +17,7 @@
// like 32-bit ints
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__nesf2vfp)
vmov s14, r0 // move from GPR 0 to float register
vmov s15, r1 // move from GPR 1 to float register
Modified: compiler-rt/trunk/lib/builtins/arm/restore_vfp_d8_d15_regs.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/restore_vfp_d8_d15_regs.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/restore_vfp_d8_d15_regs.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/restore_vfp_d8_d15_regs.S Mon May 12 10:23:37 2014
@@ -25,7 +25,7 @@
//
// Restore registers d8-d15 from stack
//
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_PRIVATE_FUNCTION(__restore_vfp_d8_d15_regs)
vldmia sp!, {d8-d15} // pop registers d8-d15 off stack
bx lr // return to prolog
Modified: compiler-rt/trunk/lib/builtins/arm/save_vfp_d8_d15_regs.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/save_vfp_d8_d15_regs.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/save_vfp_d8_d15_regs.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/save_vfp_d8_d15_regs.S Mon May 12 10:23:37 2014
@@ -25,7 +25,7 @@
//
// Save registers d8-d15 onto stack
//
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_PRIVATE_FUNCTION(__save_vfp_d8_d15_regs)
vstmdb sp!, {d8-d15} // push registers d8-d15 onto stack
bx lr // return to prolog
Modified: compiler-rt/trunk/lib/builtins/arm/subdf3vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/subdf3vfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/subdf3vfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/subdf3vfp.S Mon May 12 10:23:37 2014
@@ -16,7 +16,7 @@
// the Darwin calling convention where double arguments are passsed in GPR pairs
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__subdf3vfp)
vmov d6, r0, r1 // move first param from r0/r1 pair into d6
vmov d7, r2, r3 // move second param from r2/r3 pair into d7
Modified: compiler-rt/trunk/lib/builtins/arm/subsf3vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/subsf3vfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/subsf3vfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/subsf3vfp.S Mon May 12 10:23:37 2014
@@ -17,7 +17,7 @@
// like 32-bit ints.
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__subsf3vfp)
vmov s14, r0 // move first param from r0 into float register
vmov s15, r1 // move second param from r1 into float register
Modified: compiler-rt/trunk/lib/builtins/arm/switch16.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/switch16.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/switch16.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/switch16.S Mon May 12 10:23:37 2014
@@ -29,7 +29,7 @@
// The table contains signed 2-byte sized elements which are 1/2 the distance
// from lr to the target label.
//
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_PRIVATE_FUNCTION(__switch16)
ldrh ip, [lr, #-1] // get first 16-bit word in table
cmp r0, ip // compare with index
Modified: compiler-rt/trunk/lib/builtins/arm/switch32.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/switch32.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/switch32.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/switch32.S Mon May 12 10:23:37 2014
@@ -29,7 +29,7 @@
// The table contains signed 4-byte sized elements which are the distance
// from lr to the target label.
//
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_PRIVATE_FUNCTION(__switch32)
ldr ip, [lr, #-1] // get first 32-bit word in table
cmp r0, ip // compare with index
Modified: compiler-rt/trunk/lib/builtins/arm/switch8.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/switch8.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/switch8.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/switch8.S Mon May 12 10:23:37 2014
@@ -29,7 +29,7 @@
// The table contains signed byte sized elements which are 1/2 the distance
// from lr to the target label.
//
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_PRIVATE_FUNCTION(__switch8)
ldrb ip, [lr, #-1] // get first byte in table
cmp r0, ip // signed compare with index
Modified: compiler-rt/trunk/lib/builtins/arm/switchu8.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/switchu8.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/switchu8.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/switchu8.S Mon May 12 10:23:37 2014
@@ -29,7 +29,7 @@
// The table contains unsigned byte sized elements which are 1/2 the distance
// from lr to the target label.
//
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_PRIVATE_FUNCTION(__switchu8)
ldrb ip, [lr, #-1] // get first byte in table
cmp r0, ip // compare with index
Modified: compiler-rt/trunk/lib/builtins/arm/sync-ops.h
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/sync-ops.h?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/sync-ops.h (original)
+++ compiler-rt/trunk/lib/builtins/arm/sync-ops.h Mon May 12 10:23:37 2014
@@ -16,7 +16,7 @@
#include "../assembly.h"
#define SYNC_OP_4(op) \
- .align 2 ; \
+ .p2align 2 ; \
.thumb ; \
DEFINE_COMPILERRT_FUNCTION(__sync_fetch_and_ ## op) \
dmb ; \
@@ -30,7 +30,7 @@
bx lr
#define SYNC_OP_8(op) \
- .align 2 ; \
+ .p2align 2 ; \
.thumb ; \
DEFINE_COMPILERRT_FUNCTION(__sync_fetch_and_ ## op) \
push {r4, r5, r6, lr} ; \
Modified: compiler-rt/trunk/lib/builtins/arm/sync_synchronize.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/sync_synchronize.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/sync_synchronize.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/sync_synchronize.S Mon May 12 10:23:37 2014
@@ -21,7 +21,7 @@
#if __APPLE__
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_PRIVATE_FUNCTION(__sync_synchronize)
stmfd sp!, {r7, lr}
add r7, sp, #0
Modified: compiler-rt/trunk/lib/builtins/arm/truncdfsf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/truncdfsf2vfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/truncdfsf2vfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/truncdfsf2vfp.S Mon May 12 10:23:37 2014
@@ -17,7 +17,7 @@
// passed in a R0/R1 pair and a signle precision result is returned in R0.
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__truncdfsf2vfp)
vmov d7, r0, r1 // load double from r0/r1 pair
vcvt.f32.f64 s15, d7 // convert double to single (trucate precision)
Modified: compiler-rt/trunk/lib/builtins/arm/unorddf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/unorddf2vfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/unorddf2vfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/unorddf2vfp.S Mon May 12 10:23:37 2014
@@ -17,7 +17,7 @@
// like in GPR pairs.
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__unorddf2vfp)
vmov d6, r0, r1 // load r0/r1 pair in double register
vmov d7, r2, r3 // load r2/r3 pair in double register
Modified: compiler-rt/trunk/lib/builtins/arm/unordsf2vfp.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/arm/unordsf2vfp.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/arm/unordsf2vfp.S (original)
+++ compiler-rt/trunk/lib/builtins/arm/unordsf2vfp.S Mon May 12 10:23:37 2014
@@ -17,7 +17,7 @@
// like 32-bit ints
//
.syntax unified
- .align 2
+ .p2align 2
DEFINE_COMPILERRT_FUNCTION(__unordsf2vfp)
vmov s14, r0 // move from GPR 0 to float register
vmov s15, r1 // move from GPR 1 to float register
Modified: compiler-rt/trunk/lib/builtins/i386/ashldi3.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/i386/ashldi3.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/i386/ashldi3.S (original)
+++ compiler-rt/trunk/lib/builtins/i386/ashldi3.S Mon May 12 10:23:37 2014
@@ -16,7 +16,7 @@
#ifdef __SSE2__
.text
-.align 4
+.balign 4
DEFINE_COMPILERRT_FUNCTION(__ashldi3)
movd 12(%esp), %xmm2 // Load count
#ifndef TRUST_CALLERS_USE_64_BIT_STORES
@@ -36,7 +36,7 @@ END_COMPILERRT_FUNCTION(__ashldi3)
#else // Use GPRs instead of SSE2 instructions, if they aren't available.
.text
-.align 4
+.balign 4
DEFINE_COMPILERRT_FUNCTION(__ashldi3)
movl 12(%esp), %ecx // Load count
movl 8(%esp), %edx // Load high
Modified: compiler-rt/trunk/lib/builtins/i386/ashrdi3.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/i386/ashrdi3.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/i386/ashrdi3.S (original)
+++ compiler-rt/trunk/lib/builtins/i386/ashrdi3.S Mon May 12 10:23:37 2014
@@ -9,7 +9,7 @@
#ifdef __SSE2__
.text
-.align 4
+.balign 4
DEFINE_COMPILERRT_FUNCTION(__ashrdi3)
movd 12(%esp), %xmm2 // Load count
movl 8(%esp), %eax
@@ -46,7 +46,7 @@ END_COMPILERRT_FUNCTION(__ashrdi3)
#else // Use GPRs instead of SSE2 instructions, if they aren't available.
.text
-.align 4
+.balign 4
DEFINE_COMPILERRT_FUNCTION(__ashrdi3)
movl 12(%esp), %ecx // Load count
movl 8(%esp), %edx // Load high
Modified: compiler-rt/trunk/lib/builtins/i386/divdi3.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/i386/divdi3.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/i386/divdi3.S (original)
+++ compiler-rt/trunk/lib/builtins/i386/divdi3.S Mon May 12 10:23:37 2014
@@ -19,7 +19,7 @@
#ifdef __i386__
.text
-.align 4
+.balign 4
DEFINE_COMPILERRT_FUNCTION(__divdi3)
/* This is currently implemented by wrapping the unsigned divide up in an absolute
Modified: compiler-rt/trunk/lib/builtins/i386/floatdidf.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/i386/floatdidf.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/i386/floatdidf.S (original)
+++ compiler-rt/trunk/lib/builtins/i386/floatdidf.S Mon May 12 10:23:37 2014
@@ -10,14 +10,14 @@
#ifndef __ELF__
.const
#endif
-.align 4
+.balign 4
twop52: .quad 0x4330000000000000
twop32: .quad 0x41f0000000000000
#define REL_ADDR(_a) (_a)-0b(%eax)
.text
-.align 4
+.balign 4
DEFINE_COMPILERRT_FUNCTION(__floatdidf)
cvtsi2sd 8(%esp), %xmm1
movss 4(%esp), %xmm0 // low 32 bits of a
Modified: compiler-rt/trunk/lib/builtins/i386/floatdisf.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/i386/floatdisf.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/i386/floatdisf.S (original)
+++ compiler-rt/trunk/lib/builtins/i386/floatdisf.S Mon May 12 10:23:37 2014
@@ -15,7 +15,7 @@
#ifdef __i386__
.text
-.align 4
+.balign 4
DEFINE_COMPILERRT_FUNCTION(__floatdisf)
#ifndef TRUST_CALLERS_USE_64_BIT_STORES
movd 4(%esp), %xmm0
Modified: compiler-rt/trunk/lib/builtins/i386/floatdixf.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/i386/floatdixf.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/i386/floatdixf.S (original)
+++ compiler-rt/trunk/lib/builtins/i386/floatdixf.S Mon May 12 10:23:37 2014
@@ -15,7 +15,7 @@
// It can be turned off by defining the TRUST_CALLERS_USE_64_BIT_STORES macro.
.text
-.align 4
+.balign 4
DEFINE_COMPILERRT_FUNCTION(__floatdixf)
#ifndef TRUST_CALLERS_USE_64_BIT_STORES
movd 4(%esp), %xmm0
Modified: compiler-rt/trunk/lib/builtins/i386/floatundidf.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/i386/floatundidf.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/i386/floatundidf.S (original)
+++ compiler-rt/trunk/lib/builtins/i386/floatundidf.S Mon May 12 10:23:37 2014
@@ -20,7 +20,7 @@
#ifndef __ELF__
.const
#endif
-.align 4
+.balign 4
twop52: .quad 0x4330000000000000
twop84_plus_twop52:
.quad 0x4530000000100000
@@ -29,7 +29,7 @@ twop84: .quad 0x4530000000000000
#define REL_ADDR(_a) (_a)-0b(%eax)
.text
-.align 4
+.balign 4
DEFINE_COMPILERRT_FUNCTION(__floatundidf)
movss 8(%esp), %xmm1 // high 32 bits of a
movss 4(%esp), %xmm0 // low 32 bits of a
Modified: compiler-rt/trunk/lib/builtins/i386/floatundisf.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/i386/floatundisf.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/i386/floatundisf.S (original)
+++ compiler-rt/trunk/lib/builtins/i386/floatundisf.S Mon May 12 10:23:37 2014
@@ -19,7 +19,7 @@
#ifdef __i386__
.const
-.align 3
+.balign 3
.quad 0x43f0000000000000
twop64: .quad 0x0000000000000000
@@ -27,7 +27,7 @@ twop64: .quad 0x0000000000000000
#define TWOp64 twop64-0b(%ecx,%eax,8)
.text
-.align 4
+.balign 4
DEFINE_COMPILERRT_FUNCTION(__floatundisf)
movl 8(%esp), %eax
movd 8(%esp), %xmm1
@@ -54,9 +54,9 @@ END_COMPILERRT_FUNCTION(__floatundisf)
#ifndef __ELF__
.const
-.align 3
+.balign 3
#else
-.align 8
+.balign 8
#endif
twop52: .quad 0x4330000000000000
.quad 0x0000000000000fff
@@ -68,7 +68,7 @@ twelve: .long 0x00000000
#define STICKY sticky-0b(%ecx,%eax,8)
.text
-.align 4
+.balign 4
DEFINE_COMPILERRT_FUNCTION(__floatundisf)
movl 8(%esp), %eax
movd 8(%esp), %xmm1
Modified: compiler-rt/trunk/lib/builtins/i386/floatundixf.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/i386/floatundixf.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/i386/floatundixf.S (original)
+++ compiler-rt/trunk/lib/builtins/i386/floatundixf.S Mon May 12 10:23:37 2014
@@ -10,7 +10,7 @@
#ifndef __ELF__
.const
#endif
-.align 4
+.balign 4
twop52: .quad 0x4330000000000000
twop84_plus_twop52_neg:
.quad 0xc530000000100000
@@ -19,7 +19,7 @@ twop84: .quad 0x4530000000000000
#define REL_ADDR(_a) (_a)-0b(%eax)
.text
-.align 4
+.balign 4
DEFINE_COMPILERRT_FUNCTION(__floatundixf)
calll 0f
0: popl %eax
Modified: compiler-rt/trunk/lib/builtins/i386/lshrdi3.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/i386/lshrdi3.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/i386/lshrdi3.S (original)
+++ compiler-rt/trunk/lib/builtins/i386/lshrdi3.S Mon May 12 10:23:37 2014
@@ -16,7 +16,7 @@
#ifdef __SSE2__
.text
-.align 4
+.balign 4
DEFINE_COMPILERRT_FUNCTION(__lshrdi3)
movd 12(%esp), %xmm2 // Load count
#ifndef TRUST_CALLERS_USE_64_BIT_STORES
@@ -36,7 +36,7 @@ END_COMPILERRT_FUNCTION(__lshrdi3)
#else // Use GPRs instead of SSE2 instructions, if they aren't available.
.text
-.align 4
+.balign 4
DEFINE_COMPILERRT_FUNCTION(__lshrdi3)
movl 12(%esp), %ecx // Load count
movl 8(%esp), %edx // Load high
Modified: compiler-rt/trunk/lib/builtins/i386/moddi3.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/i386/moddi3.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/i386/moddi3.S (original)
+++ compiler-rt/trunk/lib/builtins/i386/moddi3.S Mon May 12 10:23:37 2014
@@ -20,7 +20,7 @@
#ifdef __i386__
.text
-.align 4
+.balign 4
DEFINE_COMPILERRT_FUNCTION(__moddi3)
/* This is currently implemented by wrapping the unsigned modulus up in an absolute
Modified: compiler-rt/trunk/lib/builtins/i386/muldi3.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/i386/muldi3.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/i386/muldi3.S (original)
+++ compiler-rt/trunk/lib/builtins/i386/muldi3.S Mon May 12 10:23:37 2014
@@ -8,7 +8,7 @@
#ifdef __i386__
.text
-.align 4
+.balign 4
DEFINE_COMPILERRT_FUNCTION(__muldi3)
pushl %ebx
movl 16(%esp), %eax // b.lo
Modified: compiler-rt/trunk/lib/builtins/i386/udivdi3.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/i386/udivdi3.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/i386/udivdi3.S (original)
+++ compiler-rt/trunk/lib/builtins/i386/udivdi3.S Mon May 12 10:23:37 2014
@@ -19,7 +19,7 @@
#ifdef __i386__
.text
-.align 4
+.balign 4
DEFINE_COMPILERRT_FUNCTION(__udivdi3)
pushl %ebx
Modified: compiler-rt/trunk/lib/builtins/i386/umoddi3.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/i386/umoddi3.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/i386/umoddi3.S (original)
+++ compiler-rt/trunk/lib/builtins/i386/umoddi3.S Mon May 12 10:23:37 2014
@@ -20,7 +20,7 @@
#ifdef __i386__
.text
-.align 4
+.balign 4
DEFINE_COMPILERRT_FUNCTION(__umoddi3)
pushl %ebx
Modified: compiler-rt/trunk/lib/builtins/x86_64/floatundidf.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/x86_64/floatundidf.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/x86_64/floatundidf.S (original)
+++ compiler-rt/trunk/lib/builtins/x86_64/floatundidf.S Mon May 12 10:23:37 2014
@@ -20,7 +20,7 @@
#ifndef __ELF__
.const
#endif
-.align 4
+.balign 4
twop52: .quad 0x4330000000000000
twop84_plus_twop52:
.quad 0x4530000000100000
@@ -29,7 +29,7 @@ twop84: .quad 0x4530000000000000
#define REL_ADDR(_a) (_a)(%rip)
.text
-.align 4
+.balign 4
DEFINE_COMPILERRT_FUNCTION(__floatundidf)
movd %edi, %xmm0 // low 32 bits of a
shrq $32, %rdi // high 32 bits of a
Modified: compiler-rt/trunk/lib/builtins/x86_64/floatundisf.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/x86_64/floatundisf.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/x86_64/floatundisf.S (original)
+++ compiler-rt/trunk/lib/builtins/x86_64/floatundisf.S Mon May 12 10:23:37 2014
@@ -15,7 +15,7 @@ two: .single 2.0
#define REL_ADDR(_a) (_a)(%rip)
.text
-.align 4
+.balign 4
DEFINE_COMPILERRT_FUNCTION(__floatundisf)
movq $1, %rsi
testq %rdi, %rdi
Modified: compiler-rt/trunk/lib/builtins/x86_64/floatundixf.S
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/lib/builtins/x86_64/floatundixf.S?rev=208578&r1=208577&r2=208578&view=diff
==============================================================================
--- compiler-rt/trunk/lib/builtins/x86_64/floatundixf.S (original)
+++ compiler-rt/trunk/lib/builtins/x86_64/floatundixf.S Mon May 12 10:23:37 2014
@@ -10,13 +10,13 @@
#ifndef __ELF__
.const
#endif
-.align 4
+.balign 4
twop64: .quad 0x43f0000000000000
#define REL_ADDR(_a) (_a)(%rip)
.text
-.align 4
+.balign 4
DEFINE_COMPILERRT_FUNCTION(__floatundixf)
movq %rdi, -8(%rsp)
fildq -8(%rsp)
@@ -36,7 +36,7 @@ END_COMPILERRT_FUNCTION(__floatundixf)
#ifdef __x86_64__
.const
-.align 4
+.balign 4
twop52: .quad 0x4330000000000000
twop84_plus_twop52_neg:
.quad 0xc530000000100000
@@ -45,7 +45,7 @@ twop84: .quad 0x4530000000000000
#define REL_ADDR(_a) (_a)(%rip)
.text
-.align 4
+.balign 4
DEFINE_COMPILERRT_FUNCTION(__floatundixf)
movl %edi, %esi // low 32 bits of input
shrq $32, %rdi // hi 32 bits of input
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