[PATCH] AArch64: big endian constant vector pools

[Jiangning Liu]

  Hi Christian,

  I think Tim is correct. There are a couple of different solution for big
  endian, but we have to choose one of them that could meet all requirements
  and make our life easier.

  To favor  both compiler optimizations and end users' data exchange, we need
  to keep the same in-memory layout for both little endian and big endian,
  i.e. index 0 is always at low address in memory. The constant vector on LVM
  IR should finally map to literal pool. Therefore, we shouldn't reverse the
  element order of constant vector on LLVM IR.

  For non-strict-alignment mode, we should always use ldr/str, which could
  meets requirement for both correctness and performance.
  Non-strict-alignment mode is the most common case.

  For strict-alignment mode we need to introduce ld1/st1+rev for unaligned
  access to avoid hardware exception.

  Thanks,
  -Jiangning

http://reviews.llvm.org/D3305