[llvm] r205886 - [ARM64] Tighten up the special casing in emitting arithmetic extends. UXTW should only be translated when the instruction uses WSP, not SP. Vice versa for UXTX and 64-bit instructions.

[Bradley Smith]

Author: brasmi01
Date: Wed Apr  9 09:44:03 2014
New Revision: 205886

URL: http://llvm.org/viewvc/llvm-project?rev=205886&view=rev
Log:
[ARM64] Tighten up the special casing in emitting arithmetic extends. UXTW should only be translated when the instruction uses WSP, not SP. Vice versa for UXTX and 64-bit instructions.

Modified:
    llvm/trunk/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp
    llvm/trunk/test/MC/ARM64/arithmetic-encoding.s

Modified: llvm/trunk/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp?rev=205886&r1=205885&r2=205886&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp (original)
+++ llvm/trunk/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp Wed Apr  9 09:44:03 2014
@@ -1097,8 +1097,10 @@ void ARM64InstPrinter::printExtend(const
   if (ExtType == ARM64_AM::UXTW || ExtType == ARM64_AM::UXTX) {
     unsigned Dest = MI->getOperand(0).getReg();
     unsigned Src1 = MI->getOperand(1).getReg();
-    if (Dest == ARM64::SP || Dest == ARM64::WSP || Src1 == ARM64::SP ||
-        Src1 == ARM64::WSP) {
+    if ( ((Dest == ARM64::SP || Src1 == ARM64::SP) &&
+          ExtType == ARM64_AM::UXTX) ||
+         ((Dest == ARM64::WSP || Src1 == ARM64::WSP) &&
+          ExtType == ARM64_AM::UXTW) ) {
       if (ShiftVal != 0)
         O << ", lsl #" << ShiftVal;
       return;

Modified: llvm/trunk/test/MC/ARM64/arithmetic-encoding.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM64/arithmetic-encoding.s?rev=205886&r1=205885&r2=205886&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM64/arithmetic-encoding.s (original)
+++ llvm/trunk/test/MC/ARM64/arithmetic-encoding.s Wed Apr  9 09:44:03 2014
@@ -368,8 +368,8 @@ foo:
 ; CHECK: subs x3, sp, x9, lsl #2     ; encoding: [0xe3,0x6b,0x29,0xeb]
 ; CHECK: cmp wsp, w8                 ; encoding: [0xff,0x43,0x28,0x6b]
 ; CHECK: cmp wsp, w8                 ; encoding: [0xff,0x43,0x28,0x6b]
-; CHECK: cmp sp, w8                  ; encoding: [0xff,0x43,0x28,0xeb]
-; CHECK: cmp sp, w8                  ; encoding: [0xff,0x43,0x28,0xeb]
+; CHECK: cmp sp, w8, uxtw            ; encoding: [0xff,0x43,0x28,0xeb]
+; CHECK: cmp sp, w8, uxtw            ; encoding: [0xff,0x43,0x28,0xeb]
 
   sub wsp, w9, w8, uxtw
   sub w1, wsp, w8, uxtw
@@ -383,11 +383,11 @@ foo:
 ; CHECK: sub wsp, w9, w8             ; encoding: [0x3f,0x41,0x28,0x4b]
 ; CHECK: sub w1, wsp, w8             ; encoding: [0xe1,0x43,0x28,0x4b]
 ; CHECK: sub wsp, wsp, w8            ; encoding: [0xff,0x43,0x28,0x4b]
-; CHECK: sub sp, x9, w8              ; encoding: [0x3f,0x41,0x28,0xcb]
-; CHECK: sub x1, sp, w8              ; encoding: [0xe1,0x43,0x28,0xcb]
-; CHECK: sub sp, sp, w8              ; encoding: [0xff,0x43,0x28,0xcb]
+; CHECK: sub sp, x9, w8, uxtw        ; encoding: [0x3f,0x41,0x28,0xcb]
+; CHECK: sub x1, sp, w8, uxtw        ; encoding: [0xe1,0x43,0x28,0xcb]
+; CHECK: sub sp, sp, w8, uxtw        ; encoding: [0xff,0x43,0x28,0xcb]
 ; CHECK: subs w1, wsp, w8            ; encoding: [0xe1,0x43,0x28,0x6b]
-; CHECK: subs x1, sp, w8             ; encoding: [0xe1,0x43,0x28,0xeb]
+; CHECK: subs x1, sp, w8, uxtw       ; encoding: [0xe1,0x43,0x28,0xeb]
 
 ;==---------------------------------------------------------------------------==
 ; Signed/Unsigned divide