[llvm] r205880 - [ARM64] Scaled fixed-point FCVTZSs should also have bit 29 set to zero.
Bradley Smith
bradley.smith at arm.com
Wed Apr 9 07:43:27 PDT 2014
Author: brasmi01
Date: Wed Apr 9 09:43:27 2014
New Revision: 205880
URL: http://llvm.org/viewvc/llvm-project?rev=205880&view=rev
Log:
[ARM64] Scaled fixed-point FCVTZSs should also have bit 29 set to zero.
Modified:
llvm/trunk/lib/Target/ARM64/ARM64InstrFormats.td
Modified: llvm/trunk/lib/Target/ARM64/ARM64InstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM64/ARM64InstrFormats.td?rev=205880&r1=205879&r2=205880&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM64/ARM64InstrFormats.td (original)
+++ llvm/trunk/lib/Target/ARM64/ARM64InstrFormats.td Wed Apr 9 09:43:27 2014
@@ -3071,7 +3071,7 @@ class BaseFPToInteger<bits<2> type, bits
bits<5> Rd;
bits<5> Rn;
bits<6> scale;
- let Inst{30} = 0;
+ let Inst{30-29} = 0b00;
let Inst{28-24} = 0b11110;
let Inst{23-22} = type;
let Inst{21} = 0;
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