[llvm] r205864 - [ARM64] Add support for NV condition code (exists only for valid assembly/disassembly, equivilant to AL)
Bradley Smith
bradley.smith at arm.com
Wed Apr 9 07:42:07 PDT 2014
Author: brasmi01
Date: Wed Apr 9 09:42:07 2014
New Revision: 205864
URL: http://llvm.org/viewvc/llvm-project?rev=205864&view=rev
Log:
[ARM64] Add support for NV condition code (exists only for valid assembly/disassembly, equivilant to AL)
Added:
llvm/trunk/test/MC/ARM64/nv-cond.s (with props)
Modified:
llvm/trunk/lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp
llvm/trunk/lib/Target/ARM64/MCTargetDesc/ARM64BaseInfo.h
Modified: llvm/trunk/lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp?rev=205864&r1=205863&r2=205864&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp (original)
+++ llvm/trunk/lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp Wed Apr 9 09:42:07 2014
@@ -2188,7 +2188,7 @@ ARM64AsmParser::tryParseFPImm(OperandVec
/// parseCondCodeString - Parse a Condition Code string.
unsigned ARM64AsmParser::parseCondCodeString(StringRef Cond) {
- unsigned CC = StringSwitch<unsigned>(Cond)
+ unsigned CC = StringSwitch<unsigned>(Cond.lower())
.Case("eq", ARM64CC::EQ)
.Case("ne", ARM64CC::NE)
.Case("cs", ARM64CC::CS)
@@ -2206,25 +2206,8 @@ unsigned ARM64AsmParser::parseCondCodeSt
.Case("gt", ARM64CC::GT)
.Case("le", ARM64CC::LE)
.Case("al", ARM64CC::AL)
- // Upper case works too. Not mixed case, though.
- .Case("EQ", ARM64CC::EQ)
- .Case("NE", ARM64CC::NE)
- .Case("CS", ARM64CC::CS)
- .Case("HS", ARM64CC::CS)
- .Case("CC", ARM64CC::CC)
- .Case("LO", ARM64CC::CC)
- .Case("MI", ARM64CC::MI)
- .Case("PL", ARM64CC::PL)
- .Case("VS", ARM64CC::VS)
- .Case("VC", ARM64CC::VC)
- .Case("HI", ARM64CC::HI)
- .Case("LS", ARM64CC::LS)
- .Case("GE", ARM64CC::GE)
- .Case("LT", ARM64CC::LT)
- .Case("GT", ARM64CC::GT)
- .Case("LE", ARM64CC::LE)
- .Case("AL", ARM64CC::AL)
- .Default(~0U);
+ .Case("nv", ARM64CC::NV)
+ .Default(ARM64CC::Invalid);
return CC;
}
@@ -2237,7 +2220,7 @@ bool ARM64AsmParser::parseCondCode(Opera
StringRef Cond = Tok.getString();
unsigned CC = parseCondCodeString(Cond);
- if (CC == ~0U)
+ if (CC == ARM64CC::Invalid)
return TokError("invalid condition code");
Parser.Lex(); // Eat identifier token.
@@ -3566,7 +3549,7 @@ bool ARM64AsmParser::ParseInstruction(Pa
SMLoc SuffixLoc = SMLoc::getFromPointer(NameLoc.getPointer() +
(Head.data() - Name.data()));
unsigned CC = parseCondCodeString(Head);
- if (CC == ~0U)
+ if (CC == ARM64CC::Invalid)
return Error(SuffixLoc, "invalid condition code");
const MCExpr *CCExpr = MCConstantExpr::Create(CC, getContext());
Operands.push_back(
Modified: llvm/trunk/lib/Target/ARM64/MCTargetDesc/ARM64BaseInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM64/MCTargetDesc/ARM64BaseInfo.h?rev=205864&r1=205863&r2=205864&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM64/MCTargetDesc/ARM64BaseInfo.h (original)
+++ llvm/trunk/lib/Target/ARM64/MCTargetDesc/ARM64BaseInfo.h Wed Apr 9 09:42:07 2014
@@ -200,14 +200,15 @@ enum CondCode { // Meaning (integer)
LT = 0xb, // Less than Less than, or unordered
GT = 0xc, // Greater than Greater than
LE = 0xd, // Less than or equal <, ==, or unordered
- AL = 0xe // Always (unconditional) Always (unconditional)
+ AL = 0xe, // Always (unconditional) Always (unconditional)
+ NV = 0xf, // Always (unconditional) Always (unconditional)
+ // Note the NV exists purely to disassemble 0b1111. Execution is "always".
+ Invalid
};
inline static const char *getCondCodeName(CondCode Code) {
- // cond<0> is ignored when cond<3:1> = 111, where 1110 is 0xe (aka AL).
- if ((Code & AL) == AL)
- Code = AL;
switch (Code) {
+ default: llvm_unreachable("Unknown condition code");
case EQ: return "eq";
case NE: return "ne";
case CS: return "cs";
@@ -223,8 +224,8 @@ inline static const char *getCondCodeNam
case GT: return "gt";
case LE: return "le";
case AL: return "al";
+ case NV: return "nv";
}
- llvm_unreachable("Unknown condition code");
}
inline static CondCode getInvertedCondCode(CondCode Code) {
Added: llvm/trunk/test/MC/ARM64/nv-cond.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM64/nv-cond.s?rev=205864&view=auto
==============================================================================
--- llvm/trunk/test/MC/ARM64/nv-cond.s (added)
+++ llvm/trunk/test/MC/ARM64/nv-cond.s Wed Apr 9 09:42:07 2014
@@ -0,0 +1,11 @@
+// RUN: llvm-mc < %s -triple arm64 -show-encoding | FileCheck %s
+
+fcsel d28,d31,d31,nv
+csel x0,x0,x0,nv
+ccmp x0,x0,#0,nv
+b.nv #0
+
+// CHECK: fcsel d28, d31, d31, nv // encoding: [0xfc,0xff,0x7f,0x1e]
+// CHECK: csel x0, x0, x0, nv // encoding: [0x00,0xf0,0x80,0x9a]
+// CHECK: ccmp x0, x0, #0, nv // encoding: [0x00,0xf0,0x40,0xfa]
+// CHECK: b.nv #0 // encoding: [0x0f,0x00,0x00,0x54]
Propchange: llvm/trunk/test/MC/ARM64/nv-cond.s
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svn:eol-style = native
Propchange: llvm/trunk/test/MC/ARM64/nv-cond.s
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svn:keywords = Rev Date Author URL Id
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