[PATCH][mips] Add Octeon cnMips instructions mtmX and mtpX

[Kai Nacke]

Hi all!

This patch adds the mentioned Octeon cnMips instructions. Requires my 
previous Octeon patch to apply cleanly. Test cases included.

Please review.

Regards,
Kai
-------------- next part --------------
From 44c2cc86f28816858c9c1c25f3ef68ce68e249ca Mon Sep 17 00:00:00 2001
From: kai <kai at redstar.de>
Date: Fri, 28 Mar 2014 17:05:26 +0100
Subject: [PATCH 2/2] Add Octeon cnMips instructions mtmX and mtpX.

---
 lib/Target/Mips/Mips64InstrInfo.td  |  8 ++++++++
 lib/Target/Mips/MipsInstrFormats.td | 11 +++++++++++
 test/MC/Mips/octeon-instructions.s  | 12 ++++++++++++
 3 files changed, 31 insertions(+)

diff --git a/lib/Target/Mips/Mips64InstrInfo.td b/lib/Target/Mips/Mips64InstrInfo.td
index edfe5a7..e80e18f 100644
--- a/lib/Target/Mips/Mips64InstrInfo.td
+++ b/lib/Target/Mips/Mips64InstrInfo.td
@@ -271,6 +271,14 @@ def EXTS32: ExtsCins<"exts32", MipsExtS32>, EXTS_FM<0x3b>;
 def CINS  : ExtsCins<"cins", MipsCIns>, EXTS_FM<0x32>;
 def CINS32: ExtsCins<"cins32", MipsCIns32>, EXTS_FM<0x33>;
 
+// Move to multiplier/product register
+def MTM0   : MoveToLOHI<"mtm0", GPR64Opnd, [MPL0, P0, P1, P2]>, MTMR_FM<0x08>;
+def MTM1   : MoveToLOHI<"mtm1", GPR64Opnd, [MPL1, P0, P1, P2]>, MTMR_FM<0x0c>;
+def MTM2   : MoveToLOHI<"mtm2", GPR64Opnd, [MPL2, P0, P1, P2]>, MTMR_FM<0x0d>;
+def MTP0   : MoveToLOHI<"mtp0", GPR64Opnd, [P0]>, MTMR_FM<0x09>;
+def MTP1   : MoveToLOHI<"mtp1", GPR64Opnd, [P1]>, MTMR_FM<0x0a>;
+def MTP2   : MoveToLOHI<"mtp2", GPR64Opnd, [P2]>, MTMR_FM<0x0b>;
+
 // Count Ones in a Word/Doubleword
 def POP   : Count1s<"pop", GPR32Opnd>, POP_FM<0x2c>;
 def DPOP  : Count1s<"dpop", GPR64Opnd>, POP_FM<0x2d>;
diff --git a/lib/Target/Mips/MipsInstrFormats.td b/lib/Target/Mips/MipsInstrFormats.td
index 79c5d26..38fac88 100644
--- a/lib/Target/Mips/MipsInstrFormats.td
+++ b/lib/Target/Mips/MipsInstrFormats.td
@@ -505,6 +505,17 @@ class EXTS_FM<bits<6> funct> : StdArch {
   let Inst{5-0}   = funct;
 }
 
+class MTMR_FM<bits<6> funct> : StdArch {
+  bits<5> rs;
+
+  bits<32> Inst;
+
+  let Inst{31-26} = 0x1c;
+  let Inst{25-21} = rs;
+  let Inst{20-6}  = 0;
+  let Inst{5-0}   = funct;
+}
+
 class POP_FM<bits<6> funct> : StdArch {
   bits<5> rd;
   bits<5> rs;
diff --git a/test/MC/Mips/octeon-instructions.s b/test/MC/Mips/octeon-instructions.s
index 77527b9..0244e19 100644
--- a/test/MC/Mips/octeon-instructions.s
+++ b/test/MC/Mips/octeon-instructions.s
@@ -18,6 +18,12 @@
 # CHECK: exts  $15, $15, 17, 6        # encoding: [0x71,0xef,0x34,0x7a]
 # CHECK: exts32 $4, $13, 10, 8        # encoding: [0x71,0xa4,0x42,0xbb]
 # CHECK: exts32 $15, $15, 11, 20      # encoding: [0x71,0xef,0xa2,0xfb]
+# CHECK: mtm0  $15                    # encoding: [0x71,0xe0,0x00,0x08]
+# CHECK: mtm1  $16                    # encoding: [0x72,0x00,0x00,0x0c]
+# CHECK: mtm2  $17                    # encoding: [0x72,0x20,0x00,0x0d]
+# CHECK: mtp0  $18                    # encoding: [0x72,0x40,0x00,0x09]
+# CHECK: mtp1  $19                    # encoding: [0x72,0x60,0x00,0x0a]
+# CHECK: mtp2  $20                    # encoding: [0x72,0x80,0x00,0x0b]
 # CHECK: pop   $9, $6                 # encoding: [0x70,0xc0,0x48,0x2c]
 # CHECK: pop   $8, $19                # encoding: [0x72,0x60,0x40,0x2c]
 # CHECK: pop   $2, $2                 # encoding: [0x70,0x40,0x10,0x2c]
@@ -44,6 +50,12 @@
   exts  $15, 17, 6
   exts32 $4, $13, 10, 8
   exts32 $15, 11, 20
+  mtm0  $15
+  mtm1  $16
+  mtm2  $17
+  mtp0  $18
+  mtp1  $19
+  mtp2  $20
   pop   $9, $6
   pop   $8, $19
   pop   $2
-- 
1.8.0.msysgit.0