[llvm] r203204 - Replace PROLOG_LABEL with a new CFI_INSTRUCTION.
Eric Christopher
echristo at gmail.com
Fri Mar 7 13:11:59 PST 2014
isPosition seems a little awkward. What do you mean by position?
-eric
On Thu, Mar 6, 2014 at 10:08 PM, Rafael Espindola
<rafael.espindola at gmail.com> wrote:
> Author: rafael
> Date: Fri Mar 7 00:08:31 2014
> New Revision: 203204
>
> URL: http://llvm.org/viewvc/llvm-project?rev=203204&view=rev
> Log:
> Replace PROLOG_LABEL with a new CFI_INSTRUCTION.
>
> The old system was fairly convoluted:
> * A temporary label was created.
> * A single PROLOG_LABEL was created with it.
> * A few MCCFIInstructions were created with the same label.
>
> The semantics were that the cfi instructions were mapped to the PROLOG_LABEL
> via the temporary label. The output position was that of the PROLOG_LABEL.
> The temporary label itself was used only for doing the mapping.
>
> The new CFI_INSTRUCTION has a 1:1 mapping to MCCFIInstructions and points to
> one by holding an index into the CFI instructions of this function.
>
> I did consider removing MMI.getFrameInstructions completelly and having
> CFI_INSTRUCTION own a MCCFIInstruction, but MCCFIInstructions have non
> trivial constructors and destructors and are somewhat big, so the this setup
> is probably better.
>
> The net result is that we don't create temporary labels that are never used.
>
> Modified:
> llvm/trunk/include/llvm/CodeGen/AsmPrinter.h
> llvm/trunk/include/llvm/CodeGen/MachineInstr.h
> llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h
> llvm/trunk/include/llvm/CodeGen/MachineModuleInfo.h
> llvm/trunk/include/llvm/CodeGen/MachineOperand.h
> llvm/trunk/include/llvm/Target/Target.td
> llvm/trunk/include/llvm/Target/TargetOpcodes.h
> llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
> llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
> llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp
> llvm/trunk/lib/CodeGen/MachineCSE.cpp
> llvm/trunk/lib/CodeGen/MachineInstr.cpp
> llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp
> llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp
> llvm/trunk/lib/CodeGen/TargetInstrInfo.cpp
> llvm/trunk/lib/Target/AArch64/AArch64FrameLowering.cpp
> llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp
> llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
> llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
> llvm/trunk/lib/Target/ARM/ARMFrameLowering.cpp
> llvm/trunk/lib/Target/ARM/MLxExpansionPass.cpp
> llvm/trunk/lib/Target/ARM/Thumb1FrameLowering.cpp
> llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp
> llvm/trunk/lib/Target/Hexagon/HexagonMachineScheduler.cpp
> llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.cpp
> llvm/trunk/lib/Target/Mips/Mips16FrameLowering.cpp
> llvm/trunk/lib/Target/Mips/MipsDelaySlotFiller.cpp
> llvm/trunk/lib/Target/Mips/MipsSEFrameLowering.cpp
> llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp
> llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp
> llvm/trunk/lib/Target/Sparc/DelaySlotFiller.cpp
> llvm/trunk/lib/Target/Sparc/SparcCodeEmitter.cpp
> llvm/trunk/lib/Target/Sparc/SparcFrameLowering.cpp
> llvm/trunk/lib/Target/SystemZ/SystemZFrameLowering.cpp
> llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
> llvm/trunk/lib/Target/X86/X86FrameLowering.cpp
> llvm/trunk/lib/Target/X86/X86FrameLowering.h
> llvm/trunk/lib/Target/XCore/XCoreFrameLowering.cpp
> llvm/trunk/lib/Target/XCore/XCoreMachineFunctionInfo.h
> llvm/trunk/test/CodeGen/AArch64/pic-eh-stubs.ll
> llvm/trunk/test/CodeGen/ARM/indirectbr-2.ll
> llvm/trunk/test/CodeGen/ARM/indirectbr.ll
> llvm/trunk/test/CodeGen/X86/pr10420.ll
> llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp
> llvm/trunk/utils/TableGen/CodeGenTarget.cpp
>
> Modified: llvm/trunk/include/llvm/CodeGen/AsmPrinter.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/AsmPrinter.h?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/CodeGen/AsmPrinter.h (original)
> +++ llvm/trunk/include/llvm/CodeGen/AsmPrinter.h Fri Mar 7 00:08:31 2014
> @@ -208,7 +208,7 @@ namespace llvm {
> /// function.
> void EmitFunctionBody();
>
> - void emitPrologLabel(const MachineInstr &MI);
> + void emitCFIInstruction(const MachineInstr &MI);
>
> enum CFIMoveType {
> CFI_M_None,
>
> Modified: llvm/trunk/include/llvm/CodeGen/MachineInstr.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineInstr.h?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/CodeGen/MachineInstr.h (original)
> +++ llvm/trunk/include/llvm/CodeGen/MachineInstr.h Fri Mar 7 00:08:31 2014
> @@ -637,19 +637,19 @@ public:
> /// bundle remain bundled.
> void eraseFromBundle();
>
> + bool isEHLabel() const { return getOpcode() == TargetOpcode::EH_LABEL; }
> + bool isGCLabel() const { return getOpcode() == TargetOpcode::GC_LABEL; }
> +
> /// isLabel - Returns true if the MachineInstr represents a label.
> ///
> - bool isLabel() const {
> - return getOpcode() == TargetOpcode::PROLOG_LABEL ||
> - getOpcode() == TargetOpcode::EH_LABEL ||
> - getOpcode() == TargetOpcode::GC_LABEL;
> + bool isLabel() const { return isEHLabel() || isGCLabel(); }
> + bool isCFIInstruction() const {
> + return getOpcode() == TargetOpcode::CFI_INSTRUCTION;
> }
>
> - bool isPrologLabel() const {
> - return getOpcode() == TargetOpcode::PROLOG_LABEL;
> - }
> - bool isEHLabel() const { return getOpcode() == TargetOpcode::EH_LABEL; }
> - bool isGCLabel() const { return getOpcode() == TargetOpcode::GC_LABEL; }
> + // True if the instruction represents a position in the function.
> + bool isPosition() const { return isLabel() || isCFIInstruction(); }
> +
> bool isDebugValue() const { return getOpcode() == TargetOpcode::DBG_VALUE; }
> /// A DBG_VALUE is indirect iff the first operand is a register and
> /// the second operand is an immediate.
> @@ -715,7 +715,7 @@ public:
> // Pseudo-instructions that don't produce any real output.
> case TargetOpcode::IMPLICIT_DEF:
> case TargetOpcode::KILL:
> - case TargetOpcode::PROLOG_LABEL:
> + case TargetOpcode::CFI_INSTRUCTION:
> case TargetOpcode::EH_LABEL:
> case TargetOpcode::GC_LABEL:
> case TargetOpcode::DBG_VALUE:
>
> Modified: llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h (original)
> +++ llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h Fri Mar 7 00:08:31 2014
> @@ -172,7 +172,12 @@ public:
> MI->addOperand(*MF, MachineOperand::CreateMetadata(MD));
> return *this;
> }
> -
> +
> + const MachineInstrBuilder &addCFIIndex(unsigned CFIIndex) const {
> + MI->addOperand(*MF, MachineOperand::CreateCFIIndex(CFIIndex));
> + return *this;
> + }
> +
> const MachineInstrBuilder &addSym(MCSymbol *Sym) const {
> MI->addOperand(*MF, MachineOperand::CreateMCSymbol(Sym));
> return *this;
>
> Modified: llvm/trunk/include/llvm/CodeGen/MachineModuleInfo.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineModuleInfo.h?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/CodeGen/MachineModuleInfo.h (original)
> +++ llvm/trunk/include/llvm/CodeGen/MachineModuleInfo.h Fri Mar 7 00:08:31 2014
> @@ -238,8 +238,10 @@ public:
> return FrameInstructions;
> }
>
> - void addFrameInst(const MCCFIInstruction &Inst) {
> + unsigned LLVM_ATTRIBUTE_UNUSED_RESULT
> + addFrameInst(const MCCFIInstruction &Inst) {
> FrameInstructions.push_back(Inst);
> + return FrameInstructions.size() - 1;
> }
>
> /// getCompactUnwindEncoding - Returns the compact unwind encoding for a
>
> Modified: llvm/trunk/include/llvm/CodeGen/MachineOperand.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineOperand.h?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/CodeGen/MachineOperand.h (original)
> +++ llvm/trunk/include/llvm/CodeGen/MachineOperand.h Fri Mar 7 00:08:31 2014
> @@ -58,7 +58,8 @@ public:
> MO_RegisterMask, ///< Mask of preserved registers.
> MO_RegisterLiveOut, ///< Mask of live-out registers.
> MO_Metadata, ///< Metadata reference (for debug info)
> - MO_MCSymbol ///< MCSymbol reference (for debug/eh info)
> + MO_MCSymbol, ///< MCSymbol reference (for debug/eh info)
> + MO_CFIIndex ///< MCCFIInstruction index.
> };
>
> private:
> @@ -156,7 +157,8 @@ private:
> int64_t ImmVal; // For MO_Immediate.
> const uint32_t *RegMask; // For MO_RegisterMask and MO_RegisterLiveOut.
> const MDNode *MD; // For MO_Metadata.
> - MCSymbol *Sym; // For MO_MCSymbol
> + MCSymbol *Sym; // For MO_MCSymbol.
> + unsigned CFIIndex; // For MO_CFI.
>
> struct { // For MO_Register.
> // Register number is in SmallContents.RegNo.
> @@ -252,7 +254,7 @@ public:
> /// isMetadata - Tests if this is a MO_Metadata operand.
> bool isMetadata() const { return OpKind == MO_Metadata; }
> bool isMCSymbol() const { return OpKind == MO_MCSymbol; }
> -
> + bool isCFIIndex() const { return OpKind == MO_CFIIndex; }
>
> //===--------------------------------------------------------------------===//
> // Accessors for Register Operands
> @@ -443,6 +445,11 @@ public:
> return Contents.Sym;
> }
>
> + unsigned getCFIIndex() const {
> + assert(isCFIIndex() && "Wrong MachineOperand accessor");
> + return Contents.CFIIndex;
> + }
> +
> /// getOffset - Return the offset from the symbol in this operand. This always
> /// returns 0 for ExternalSymbol operands.
> int64_t getOffset() const {
> @@ -686,6 +693,12 @@ public:
> return Op;
> }
>
> + static MachineOperand CreateCFIIndex(unsigned CFIIndex) {
> + MachineOperand Op(MachineOperand::MO_CFIIndex);
> + Op.Contents.CFIIndex = CFIIndex;
> + return Op;
> + }
> +
> friend class MachineInstr;
> friend class MachineRegisterInfo;
> private:
>
> Modified: llvm/trunk/include/llvm/Target/Target.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/Target.td?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/Target/Target.td (original)
> +++ llvm/trunk/include/llvm/Target/Target.td Fri Mar 7 00:08:31 2014
> @@ -714,7 +714,7 @@ def INLINEASM : Instruction {
> let AsmString = "";
> let neverHasSideEffects = 1; // Note side effect is encoded in an operand.
> }
> -def PROLOG_LABEL : Instruction {
> +def CFI_INSTRUCTION : Instruction {
> let OutOperandList = (outs);
> let InOperandList = (ins i32imm:$id);
> let AsmString = "";
>
> Modified: llvm/trunk/include/llvm/Target/TargetOpcodes.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetOpcodes.h?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/include/llvm/Target/TargetOpcodes.h (original)
> +++ llvm/trunk/include/llvm/Target/TargetOpcodes.h Fri Mar 7 00:08:31 2014
> @@ -25,7 +25,7 @@ namespace TargetOpcode {
> enum {
> PHI = 0,
> INLINEASM = 1,
> - PROLOG_LABEL = 2,
> + CFI_INSTRUCTION = 2,
> EH_LABEL = 3,
> GC_LABEL = 4,
>
>
> Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp (original)
> +++ llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp Fri Mar 7 00:08:31 2014
> @@ -699,9 +699,7 @@ bool AsmPrinter::needsSEHMoves() {
> MF->getFunction()->needsUnwindTableEntry();
> }
>
> -void AsmPrinter::emitPrologLabel(const MachineInstr &MI) {
> - const MCSymbol *Label = MI.getOperand(0).getMCSymbol();
> -
> +void AsmPrinter::emitCFIInstruction(const MachineInstr &MI) {
> ExceptionHandling::ExceptionsType ExceptionHandlingType =
> MAI->getExceptionHandlingType();
> if (ExceptionHandlingType != ExceptionHandling::DwarfCFI &&
> @@ -716,16 +714,9 @@ void AsmPrinter::emitPrologLabel(const M
>
> const MachineModuleInfo &MMI = MF->getMMI();
> const std::vector<MCCFIInstruction> &Instrs = MMI.getFrameInstructions();
> - bool FoundOne = false;
> - (void)FoundOne;
> - for (std::vector<MCCFIInstruction>::const_iterator I = Instrs.begin(),
> - E = Instrs.end(); I != E; ++I) {
> - if (I->getLabel() == Label) {
> - emitCFIInstruction(*I);
> - FoundOne = true;
> - }
> - }
> - assert(FoundOne);
> + unsigned CFIIndex = MI.getOperand(0).getCFIIndex();
> + const MCCFIInstruction &CFI = Instrs[CFIIndex];
> + emitCFIInstruction(CFI);
> }
>
> /// EmitFunctionBody - This method emits the body and trailer for a
> @@ -748,7 +739,7 @@ void AsmPrinter::EmitFunctionBody() {
> LastMI = II;
>
> // Print the assembly for the instruction.
> - if (!II->isLabel() && !II->isImplicitDef() && !II->isKill() &&
> + if (!II->isPosition() && !II->isImplicitDef() && !II->isKill() &&
> !II->isDebugValue()) {
> HasAnyRealCode = true;
> ++EmittedInsts;
> @@ -767,8 +758,8 @@ void AsmPrinter::EmitFunctionBody() {
> emitComments(*II, OutStreamer.GetCommentOS());
>
> switch (II->getOpcode()) {
> - case TargetOpcode::PROLOG_LABEL:
> - emitPrologLabel(*II);
> + case TargetOpcode::CFI_INSTRUCTION:
> + emitCFIInstruction(*II);
> break;
>
> case TargetOpcode::EH_LABEL:
> @@ -811,7 +802,7 @@ void AsmPrinter::EmitFunctionBody() {
> // label equaling the end of function label and an invalid "row" in the
> // FDE. We need to emit a noop in this situation so that the FDE's rows are
> // valid.
> - bool RequiresNoop = LastMI && LastMI->isPrologLabel();
> + bool RequiresNoop = LastMI && LastMI->isCFIInstruction();
>
> // If the function is empty and the object file uses .subsections_via_symbols,
> // then we need to emit *something* to the function body to prevent the
>
> Modified: llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp (original)
> +++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfDebug.cpp Fri Mar 7 00:08:31 2014
> @@ -1610,7 +1610,7 @@ void DwarfDebug::beginFunction(const Mac
> History.push_back(MI);
> } else {
> // Not a DBG_VALUE instruction.
> - if (!MI->isLabel())
> + if (!MI->isPosition())
> AtBlockEntry = false;
>
> // First known non-DBG_VALUE and non-frame setup location marks
>
> Modified: llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp (original)
> +++ llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp Fri Mar 7 00:08:31 2014
> @@ -160,7 +160,7 @@ MachineBasicBlock::iterator MachineBasic
> MachineBasicBlock::iterator
> MachineBasicBlock::SkipPHIsAndLabels(MachineBasicBlock::iterator I) {
> iterator E = end();
> - while (I != E && (I->isPHI() || I->isLabel() || I->isDebugValue()))
> + while (I != E && (I->isPHI() || I->isPosition() || I->isDebugValue()))
> ++I;
> // FIXME: This needs to change if we wish to bundle labels / dbg_values
> // inside the bundle.
>
> Modified: llvm/trunk/lib/CodeGen/MachineCSE.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineCSE.cpp?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/MachineCSE.cpp (original)
> +++ llvm/trunk/lib/CodeGen/MachineCSE.cpp Fri Mar 7 00:08:31 2014
> @@ -325,8 +325,8 @@ bool MachineCSE::PhysRegDefsReach(Machin
> }
>
> bool MachineCSE::isCSECandidate(MachineInstr *MI) {
> - if (MI->isLabel() || MI->isPHI() || MI->isImplicitDef() ||
> - MI->isKill() || MI->isInlineAsm() || MI->isDebugValue())
> + if (MI->isPosition() || MI->isPHI() || MI->isImplicitDef() || MI->isKill() ||
> + MI->isInlineAsm() || MI->isDebugValue())
> return false;
>
> // Ignore copies.
>
> Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original)
> +++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Fri Mar 7 00:08:31 2014
> @@ -203,6 +203,8 @@ bool MachineOperand::isIdenticalTo(const
> return getRegMask() == Other.getRegMask();
> case MachineOperand::MO_MCSymbol:
> return getMCSymbol() == Other.getMCSymbol();
> + case MachineOperand::MO_CFIIndex:
> + return getCFIIndex() == Other.getCFIIndex();
> case MachineOperand::MO_Metadata:
> return getMetadata() == Other.getMetadata();
> }
> @@ -247,6 +249,8 @@ hash_code llvm::hash_value(const Machine
> return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getMetadata());
> case MachineOperand::MO_MCSymbol:
> return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getMCSymbol());
> + case MachineOperand::MO_CFIIndex:
> + return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getCFIIndex());
> }
> llvm_unreachable("Invalid machine operand type");
> }
> @@ -380,6 +384,9 @@ void MachineOperand::print(raw_ostream &
> case MachineOperand::MO_MCSymbol:
> OS << "<MCSym=" << *getMCSymbol() << '>';
> break;
> + case MachineOperand::MO_CFIIndex:
> + OS << "<call frame instruction>";
> + break;
> }
>
> if (unsigned TF = getTargetFlags())
> @@ -1295,8 +1302,8 @@ bool MachineInstr::isSafeToMove(const Ta
> return false;
> }
>
> - if (isLabel() || isDebugValue() ||
> - isTerminator() || hasUnmodeledSideEffects())
> + if (isPosition() || isDebugValue() || isTerminator() ||
> + hasUnmodeledSideEffects())
> return false;
>
> // See if this instruction does a load. If so, we have to guarantee that the
>
> Modified: llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp (original)
> +++ llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp Fri Mar 7 00:08:31 2014
> @@ -596,7 +596,7 @@ bool PeepholeOptimizer::runOnMachineFunc
>
> // If there exists an instruction which belongs to the following
> // categories, we will discard the load candidate.
> - if (MI->isLabel() || MI->isPHI() || MI->isImplicitDef() ||
> + if (MI->isPosition() || MI->isPHI() || MI->isImplicitDef() ||
> MI->isKill() || MI->isInlineAsm() || MI->isDebugValue() ||
> MI->hasUnmodeledSideEffects()) {
> FoldAsLoadDefReg = 0;
>
> Modified: llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp (original)
> +++ llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp Fri Mar 7 00:08:31 2014
> @@ -804,8 +804,9 @@ void ScheduleDAGInstrs::buildSchedGraph(
> "RPTracker can't find MI");
> }
>
> - assert((CanHandleTerminators || (!MI->isTerminator() && !MI->isLabel())) &&
> - "Cannot schedule terminators or labels!");
> + assert(
> + (CanHandleTerminators || (!MI->isTerminator() && !MI->isPosition())) &&
> + "Cannot schedule terminators or labels!");
>
> // Add register-based dependencies (data, anti, and output).
> bool HasVRegDef = false;
>
> Modified: llvm/trunk/lib/CodeGen/TargetInstrInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TargetInstrInfo.cpp?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/TargetInstrInfo.cpp (original)
> +++ llvm/trunk/lib/CodeGen/TargetInstrInfo.cpp Fri Mar 7 00:08:31 2014
> @@ -645,7 +645,7 @@ bool TargetInstrInfo::isSchedulingBounda
> const MachineBasicBlock *MBB,
> const MachineFunction &MF) const {
> // Terminators and labels can't be scheduled around.
> - if (MI->isTerminator() || MI->isLabel())
> + if (MI->isTerminator() || MI->isPosition())
> return true;
>
> // Don't attempt to schedule around any instruction that defines
>
> Modified: llvm/trunk/lib/Target/AArch64/AArch64FrameLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64FrameLowering.cpp?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/AArch64/AArch64FrameLowering.cpp (original)
> +++ llvm/trunk/lib/Target/AArch64/AArch64FrameLowering.cpp Fri Mar 7 00:08:31 2014
> @@ -92,14 +92,12 @@ void AArch64FrameLowering::emitPrologue(
> if (NeedsFrameMoves && NumInitialBytes) {
> // We emit this update even if the CFA is set from a frame pointer later so
> // that the CFA is valid in the interim.
> - MCSymbol *SPLabel = MMI.getContext().CreateTempSymbol();
> - BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::PROLOG_LABEL))
> - .addSym(SPLabel);
> -
> MachineLocation Dst(MachineLocation::VirtualFP);
> unsigned Reg = MRI->getDwarfRegNum(AArch64::XSP, true);
> - MMI.addFrameInst(
> - MCCFIInstruction::createDefCfa(SPLabel, Reg, -NumInitialBytes));
> + unsigned CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createDefCfa(nullptr, Reg, -NumInitialBytes));
> + BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> }
>
> // Otherwise we need to set the frame pointer and/or add a second stack
> @@ -129,12 +127,12 @@ void AArch64FrameLowering::emitPrologue(
> - MFI->getStackSize());
>
> if (NeedsFrameMoves) {
> - MCSymbol *FPLabel = MMI.getContext().CreateTempSymbol();
> - BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::PROLOG_LABEL))
> - .addSym(FPLabel);
> unsigned Reg = MRI->getDwarfRegNum(AArch64::X29, true);
> unsigned Offset = MFI->getObjectOffset(X29FrameIdx);
> - MMI.addFrameInst(MCCFIInstruction::createDefCfa(FPLabel, Reg, Offset));
> + unsigned CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createDefCfa(nullptr, Reg, Offset));
> + BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> }
>
> FPNeedsSetting = false;
> @@ -155,36 +153,29 @@ void AArch64FrameLowering::emitPrologue(
> if (!NeedsFrameMoves)
> return;
>
> - // Reuse the label if appropriate, so create it in this outer scope.
> - MCSymbol *CSLabel = 0;
> -
> // The rest of the stack adjustment
> if (!hasFP(MF) && NumResidualBytes) {
> - CSLabel = MMI.getContext().CreateTempSymbol();
> - BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::PROLOG_LABEL))
> - .addSym(CSLabel);
> -
> MachineLocation Dst(MachineLocation::VirtualFP);
> unsigned Reg = MRI->getDwarfRegNum(AArch64::XSP, true);
> unsigned Offset = NumResidualBytes + NumInitialBytes;
> - MMI.addFrameInst(MCCFIInstruction::createDefCfa(CSLabel, Reg, -Offset));
> + unsigned CFIIndex =
> + MMI.addFrameInst(MCCFIInstruction::createDefCfa(nullptr, Reg, -Offset));
> + BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> }
>
> // And any callee-saved registers (it's fine to leave them to the end here,
> // because the old values are still valid at this point.
> const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
> if (CSI.size()) {
> - if (!CSLabel) {
> - CSLabel = MMI.getContext().CreateTempSymbol();
> - BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::PROLOG_LABEL))
> - .addSym(CSLabel);
> - }
> -
> for (std::vector<CalleeSavedInfo>::const_iterator I = CSI.begin(),
> E = CSI.end(); I != E; ++I) {
> unsigned Offset = MFI->getObjectOffset(I->getFrameIdx());
> unsigned Reg = MRI->getDwarfRegNum(I->getReg(), true);
> - MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, Reg, Offset));
> + unsigned CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createOffset(nullptr, Reg, Offset));
> + BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> }
> }
> }
>
> Modified: llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp (original)
> +++ llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp Fri Mar 7 00:08:31 2014
> @@ -735,7 +735,7 @@ unsigned AArch64InstrInfo::getInstSizeIn
> return getInstBundleLength(MI);
> case TargetOpcode::IMPLICIT_DEF:
> case TargetOpcode::KILL:
> - case TargetOpcode::PROLOG_LABEL:
> + case TargetOpcode::CFI_INSTRUCTION:
> case TargetOpcode::EH_LABEL:
> case TargetOpcode::GC_LABEL:
> case TargetOpcode::DBG_VALUE:
>
> Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Fri Mar 7 00:08:31 2014
> @@ -1543,7 +1543,7 @@ bool ARMBaseInstrInfo::isSchedulingBound
> return false;
>
> // Terminators and labels can't be scheduled around.
> - if (MI->isTerminator() || MI->isLabel())
> + if (MI->isTerminator() || MI->isPosition())
> return true;
>
> // Treat the start of the IT block as a scheduling boundary, but schedule
>
> Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Fri Mar 7 00:08:31 2014
> @@ -866,7 +866,8 @@ void ARMCodeEmitter::emitPseudoInstructi
> }
> break;
> }
> - case TargetOpcode::PROLOG_LABEL:
> + case TargetOpcode::CFI_INSTRUCTION:
> + break;
> case TargetOpcode::EH_LABEL:
> MCE.emitLabel(MI.getOperand(0).getMCSymbol());
> break;
>
> Modified: llvm/trunk/lib/Target/ARM/ARMFrameLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFrameLowering.cpp?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMFrameLowering.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMFrameLowering.cpp Fri Mar 7 00:08:31 2014
> @@ -179,24 +179,22 @@ void ARMFrameLowering::emitPrologue(Mach
> if (ArgRegsSaveSize) {
> emitSPUpdate(isARM, MBB, MBBI, dl, TII, -ArgRegsSaveSize,
> MachineInstr::FrameSetup);
> - MCSymbol *SPLabel = Context.CreateTempSymbol();
> - BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::PROLOG_LABEL))
> - .addSym(SPLabel);
> CFAOffset -= ArgRegsSaveSize;
> - MMI.addFrameInst(
> - MCCFIInstruction::createDefCfaOffset(SPLabel, CFAOffset));
> + unsigned CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createDefCfaOffset(nullptr, CFAOffset));
> + BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> }
>
> if (!AFI->hasStackFrame()) {
> if (NumBytes - ArgRegsSaveSize != 0) {
> emitSPUpdate(isARM, MBB, MBBI, dl, TII, -(NumBytes - ArgRegsSaveSize),
> MachineInstr::FrameSetup);
> - MCSymbol *SPLabel = Context.CreateTempSymbol();
> - BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::PROLOG_LABEL))
> - .addSym(SPLabel);
> CFAOffset -= NumBytes - ArgRegsSaveSize;
> - MMI.addFrameInst(MCCFIInstruction::createDefCfaOffset(SPLabel,
> - CFAOffset));
> + unsigned CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createDefCfaOffset(nullptr, CFAOffset));
> + BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> }
> return;
> }
> @@ -311,12 +309,12 @@ void ARMFrameLowering::emitPrologue(Mach
> }
>
> if (adjustedGPRCS1Size > 0) {
> - MCSymbol *SPLabel = Context.CreateTempSymbol();
> - BuildMI(MBB, ++GPRCS1Push, dl, TII.get(TargetOpcode::PROLOG_LABEL))
> - .addSym(SPLabel);
> CFAOffset -= adjustedGPRCS1Size;
> - MMI.addFrameInst(
> - MCCFIInstruction::createDefCfaOffset(SPLabel, CFAOffset));
> + unsigned CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createDefCfaOffset(nullptr, CFAOffset));
> + MachineBasicBlock::iterator Pos = ++GPRCS1Push;
> + BuildMI(MBB, Pos, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> for (std::vector<CalleeSavedInfo>::const_iterator I = CSI.begin(),
> E = CSI.end(); I != E; ++I) {
> unsigned Reg = I->getReg();
> @@ -339,9 +337,10 @@ void ARMFrameLowering::emitPrologue(Mach
> case ARM::R6:
> case ARM::R7:
> case ARM::LR:
> - MMI.addFrameInst(MCCFIInstruction::createOffset(SPLabel,
> - MRI->getDwarfRegNum(Reg, true),
> - MFI->getObjectOffset(FI)));
> + CFIIndex = MMI.addFrameInst(MCCFIInstruction::createOffset(
> + nullptr, MRI->getDwarfRegNum(Reg, true), MFI->getObjectOffset(FI)));
> + BuildMI(MBB, Pos, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> break;
> }
> }
> @@ -357,28 +356,30 @@ void ARMFrameLowering::emitPrologue(Mach
> emitRegPlusImmediate(!AFI->isThumbFunction(), MBB, GPRCS1Push, dl, TII,
> FramePtr, ARM::SP, FramePtrOffsetInPush,
> MachineInstr::FrameSetup);
> - MCSymbol *SPLabel = Context.CreateTempSymbol();
> - BuildMI(MBB, GPRCS1Push, dl, TII.get(TargetOpcode::PROLOG_LABEL))
> - .addSym(SPLabel);
> if (FramePtrOffsetInPush) {
> CFAOffset += FramePtrOffsetInPush;
> - MMI.addFrameInst(
> - MCCFIInstruction::createDefCfa(SPLabel,
> - MRI->getDwarfRegNum(FramePtr, true), CFAOffset));
> - } else
> - MMI.addFrameInst(
> - MCCFIInstruction::createDefCfaRegister(SPLabel,
> - MRI->getDwarfRegNum(FramePtr, true)));
> + unsigned CFIIndex = MMI.addFrameInst(MCCFIInstruction::createDefCfa(
> + nullptr, MRI->getDwarfRegNum(FramePtr, true), CFAOffset));
> + BuildMI(MBB, GPRCS1Push, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> +
> + } else {
> + unsigned CFIIndex =
> + MMI.addFrameInst(MCCFIInstruction::createDefCfaRegister(
> + nullptr, MRI->getDwarfRegNum(FramePtr, true)));
> + BuildMI(MBB, GPRCS1Push, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> + }
> }
>
> if (GPRCS2Size > 0) {
> - MCSymbol *SPLabel = Context.CreateTempSymbol();
> - BuildMI(MBB, ++GPRCS2Push, dl, TII.get(TargetOpcode::PROLOG_LABEL))
> - .addSym(SPLabel);
> + MachineBasicBlock::iterator Pos = ++GPRCS2Push;
> if (!HasFP) {
> CFAOffset -= GPRCS2Size;
> - MMI.addFrameInst(
> - MCCFIInstruction::createDefCfaOffset(SPLabel, CFAOffset));
> + unsigned CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createDefCfaOffset(nullptr, CFAOffset));
> + BuildMI(MBB, Pos, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> }
> for (std::vector<CalleeSavedInfo>::const_iterator I = CSI.begin(),
> E = CSI.end(); I != E; ++I) {
> @@ -393,8 +394,10 @@ void ARMFrameLowering::emitPrologue(Mach
> if (STI.isTargetMachO()) {
> unsigned DwarfReg = MRI->getDwarfRegNum(Reg, true);
> unsigned Offset = MFI->getObjectOffset(FI);
> - MMI.addFrameInst(
> - MCCFIInstruction::createOffset(SPLabel, DwarfReg, Offset));
> + unsigned CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createOffset(nullptr, DwarfReg, Offset));
> + BuildMI(MBB, Pos, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> }
> break;
> }
> @@ -404,24 +407,17 @@ void ARMFrameLowering::emitPrologue(Mach
> if (DPRCSSize > 0) {
> // Since vpush register list cannot have gaps, there may be multiple vpush
> // instructions in the prologue.
> - MCSymbol *SPLabel = NULL;
> do {
> MachineBasicBlock::iterator Push = DPRCSPush++;
> if (!HasFP) {
> - SPLabel = Context.CreateTempSymbol();
> - BuildMI(MBB, DPRCSPush, dl, TII.get(TargetOpcode::PROLOG_LABEL))
> - .addSym(SPLabel);
> CFAOffset -= sizeOfSPAdjustment(Push);;
> - MMI.addFrameInst(
> - MCCFIInstruction::createDefCfaOffset(SPLabel, CFAOffset));
> + unsigned CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createDefCfaOffset(nullptr, CFAOffset));
> + BuildMI(MBB, DPRCSPush, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> }
> } while (DPRCSPush->getOpcode() == ARM::VSTMDDB_UPD);
>
> - if (!SPLabel) {
> - SPLabel = Context.CreateTempSymbol();
> - BuildMI(MBB, DPRCSPush, dl, TII.get(TargetOpcode::PROLOG_LABEL))
> - .addSym(SPLabel);
> - }
> for (std::vector<CalleeSavedInfo>::const_iterator I = CSI.begin(),
> E = CSI.end(); I != E; ++I) {
> unsigned Reg = I->getReg();
> @@ -430,20 +426,21 @@ void ARMFrameLowering::emitPrologue(Mach
> (Reg < ARM::D8 || Reg >= ARM::D8 + AFI->getNumAlignedDPRCS2Regs())) {
> unsigned DwarfReg = MRI->getDwarfRegNum(Reg, true);
> unsigned Offset = MFI->getObjectOffset(FI);
> - MMI.addFrameInst(MCCFIInstruction::createOffset(SPLabel, DwarfReg,
> - Offset));
> + unsigned CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createOffset(nullptr, DwarfReg, Offset));
> + BuildMI(MBB, DPRCSPush, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> }
> }
> }
>
> if (NumBytes) {
> if (!HasFP) {
> - MCSymbol *SPLabel = Context.CreateTempSymbol();
> - BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::PROLOG_LABEL))
> - .addSym(SPLabel);
> CFAOffset -= NumBytes;
> - MMI.addFrameInst(
> - MCCFIInstruction::createDefCfaOffset(SPLabel, CFAOffset));
> + unsigned CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createDefCfaOffset(nullptr, CFAOffset));
> + BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> }
> }
>
>
> Modified: llvm/trunk/lib/Target/ARM/MLxExpansionPass.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MLxExpansionPass.cpp?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/MLxExpansionPass.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/MLxExpansionPass.cpp Fri Mar 7 00:08:31 2014
> @@ -335,7 +335,7 @@ bool MLxExpansion::ExpandFPMLxInstructio
> while (MII != E) {
> MachineInstr *MI = &*MII;
>
> - if (MI->isLabel() || MI->isImplicitDef() || MI->isCopy()) {
> + if (MI->isPosition() || MI->isImplicitDef() || MI->isCopy()) {
> ++MII;
> continue;
> }
>
> Modified: llvm/trunk/lib/Target/ARM/Thumb1FrameLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Thumb1FrameLowering.cpp?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/Thumb1FrameLowering.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/Thumb1FrameLowering.cpp Fri Mar 7 00:08:31 2014
> @@ -114,24 +114,22 @@ void Thumb1FrameLowering::emitPrologue(M
> if (ArgRegsSaveSize) {
> emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -ArgRegsSaveSize,
> MachineInstr::FrameSetup);
> - MCSymbol *SPLabel = MMI.getContext().CreateTempSymbol();
> - BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::PROLOG_LABEL))
> - .addSym(SPLabel);
> CFAOffset -= ArgRegsSaveSize;
> - MMI.addFrameInst(
> - MCCFIInstruction::createDefCfaOffset(SPLabel, CFAOffset));
> + unsigned CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createDefCfaOffset(nullptr, CFAOffset));
> + BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> }
>
> if (!AFI->hasStackFrame()) {
> if (NumBytes - ArgRegsSaveSize != 0) {
> emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -(NumBytes - ArgRegsSaveSize),
> MachineInstr::FrameSetup);
> - MCSymbol *SPLabel = MMI.getContext().CreateTempSymbol();
> - BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::PROLOG_LABEL))
> - .addSym(SPLabel);
> CFAOffset -= NumBytes - ArgRegsSaveSize;
> - MMI.addFrameInst(
> - MCCFIInstruction::createDefCfaOffset(SPLabel, CFAOffset));
> + unsigned CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createDefCfaOffset(nullptr, CFAOffset));
> + BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> }
> return;
> }
> @@ -190,12 +188,12 @@ void Thumb1FrameLowering::emitPrologue(M
> NumBytes = 0;
> }
>
> - MCSymbol *SPLabel = MMI.getContext().CreateTempSymbol();
> - BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::PROLOG_LABEL)).addSym(SPLabel);
> if (adjustedGPRCS1Size) {
> CFAOffset -= adjustedGPRCS1Size;
> - MMI.addFrameInst(
> - MCCFIInstruction::createDefCfaOffset(SPLabel, CFAOffset));
> + unsigned CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createDefCfaOffset(nullptr, CFAOffset));
> + BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> }
> for (std::vector<CalleeSavedInfo>::const_iterator I = CSI.begin(),
> E = CSI.end(); I != E; ++I) {
> @@ -219,9 +217,10 @@ void Thumb1FrameLowering::emitPrologue(M
> case ARM::R6:
> case ARM::R7:
> case ARM::LR:
> - MMI.addFrameInst(MCCFIInstruction::createOffset(SPLabel,
> - MRI->getDwarfRegNum(Reg, true),
> - MFI->getObjectOffset(FI)));
> + unsigned CFIIndex = MMI.addFrameInst(MCCFIInstruction::createOffset(
> + nullptr, MRI->getDwarfRegNum(Reg, true), MFI->getObjectOffset(FI)));
> + BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> break;
> }
> }
> @@ -234,18 +233,19 @@ void Thumb1FrameLowering::emitPrologue(M
> AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tADDrSPi), FramePtr)
> .addReg(ARM::SP).addImm(FramePtrOffsetInBlock / 4)
> .setMIFlags(MachineInstr::FrameSetup));
> - MCSymbol *SPLabel = MMI.getContext().CreateTempSymbol();
> - BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::PROLOG_LABEL))
> - .addSym(SPLabel);
> if(FramePtrOffsetInBlock) {
> CFAOffset += FramePtrOffsetInBlock;
> - MMI.addFrameInst(
> - MCCFIInstruction::createDefCfa(SPLabel,
> - MRI->getDwarfRegNum(FramePtr, true), CFAOffset));
> - } else
> - MMI.addFrameInst(
> - MCCFIInstruction::createDefCfaRegister(SPLabel,
> - MRI->getDwarfRegNum(FramePtr, true)));
> + unsigned CFIIndex = MMI.addFrameInst(MCCFIInstruction::createDefCfa(
> + nullptr, MRI->getDwarfRegNum(FramePtr, true), CFAOffset));
> + BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> + } else {
> + unsigned CFIIndex =
> + MMI.addFrameInst(MCCFIInstruction::createDefCfaRegister(
> + nullptr, MRI->getDwarfRegNum(FramePtr, true)));
> + BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> + }
> if (NumBytes > 508)
> // If offset is > 508 then sp cannot be adjusted in a single instruction,
> // try restoring from fp instead.
> @@ -257,12 +257,11 @@ void Thumb1FrameLowering::emitPrologue(M
> emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -NumBytes,
> MachineInstr::FrameSetup);
> if (!HasFP) {
> - MCSymbol *SPLabel = MMI.getContext().CreateTempSymbol();
> - BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::PROLOG_LABEL))
> - .addSym(SPLabel);
> CFAOffset -= NumBytes;
> - MMI.addFrameInst(
> - MCCFIInstruction::createDefCfaOffset(SPLabel, CFAOffset));
> + unsigned CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createDefCfaOffset(nullptr, CFAOffset));
> + BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> }
> }
>
>
> Modified: llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp (original)
> +++ llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp Fri Mar 7 00:08:31 2014
> @@ -1654,7 +1654,7 @@ bool HexagonInstrInfo::isSchedulingBound
> return false;
>
> // Terminators and labels can't be scheduled around.
> - if (MI->getDesc().isTerminator() || MI->isLabel() || MI->isInlineAsm())
> + if (MI->getDesc().isTerminator() || MI->isPosition() || MI->isInlineAsm())
> return true;
>
> return false;
>
> Modified: llvm/trunk/lib/Target/Hexagon/HexagonMachineScheduler.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonMachineScheduler.cpp?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/Hexagon/HexagonMachineScheduler.cpp (original)
> +++ llvm/trunk/lib/Target/Hexagon/HexagonMachineScheduler.cpp Fri Mar 7 00:08:31 2014
> @@ -108,7 +108,7 @@ bool VLIWResourceModel::reserveResources
> case TargetOpcode::REG_SEQUENCE:
> case TargetOpcode::IMPLICIT_DEF:
> case TargetOpcode::KILL:
> - case TargetOpcode::PROLOG_LABEL:
> + case TargetOpcode::CFI_INSTRUCTION:
> case TargetOpcode::EH_LABEL:
> case TargetOpcode::COPY:
> case TargetOpcode::INLINEASM:
>
> Modified: llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.cpp?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.cpp (original)
> +++ llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.cpp Fri Mar 7 00:08:31 2014
> @@ -299,7 +299,7 @@ unsigned MSP430InstrInfo::GetInstSizeInB
> default:
> switch (Desc.getOpcode()) {
> default: llvm_unreachable("Unknown instruction size!");
> - case TargetOpcode::PROLOG_LABEL:
> + case TargetOpcode::CFI_INSTRUCTION:
> case TargetOpcode::EH_LABEL:
> case TargetOpcode::IMPLICIT_DEF:
> case TargetOpcode::KILL:
>
> Modified: llvm/trunk/lib/Target/Mips/Mips16FrameLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips16FrameLowering.cpp?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/Mips/Mips16FrameLowering.cpp (original)
> +++ llvm/trunk/lib/Target/Mips/Mips16FrameLowering.cpp Fri Mar 7 00:08:31 2014
> @@ -48,20 +48,14 @@ void Mips16FrameLowering::emitPrologue(M
> TII.makeFrame(Mips::SP, StackSize, MBB, MBBI);
>
> // emit ".cfi_def_cfa_offset StackSize"
> - MCSymbol *AdjustSPLabel = MMI.getContext().CreateTempSymbol();
> - BuildMI(MBB, MBBI, dl,
> - TII.get(TargetOpcode::PROLOG_LABEL)).addSym(AdjustSPLabel);
> - MMI.addFrameInst(
> - MCCFIInstruction::createDefCfaOffset(AdjustSPLabel, -StackSize));
> + unsigned CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createDefCfaOffset(nullptr, -StackSize));
> + BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
>
> const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
>
> if (CSI.size()) {
> - MCSymbol *CSLabel = MMI.getContext().CreateTempSymbol();
> - BuildMI(MBB, MBBI, dl,
> - TII.get(TargetOpcode::PROLOG_LABEL)).addSym(CSLabel);
> -
> -
> const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
>
> for (std::vector<CalleeSavedInfo>::const_iterator I = CSI.begin(),
> @@ -69,7 +63,10 @@ void Mips16FrameLowering::emitPrologue(M
> int64_t Offset = MFI->getObjectOffset(I->getFrameIdx());
> unsigned Reg = I->getReg();
> unsigned DReg = MRI->getDwarfRegNum(Reg, true);
> - MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, DReg, Offset));
> + unsigned CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createOffset(nullptr, DReg, Offset));
> + BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> }
> }
> if (hasFP(MF))
>
> Modified: llvm/trunk/lib/Target/Mips/MipsDelaySlotFiller.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsDelaySlotFiller.cpp?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/Mips/MipsDelaySlotFiller.cpp (original)
> +++ llvm/trunk/lib/Target/Mips/MipsDelaySlotFiller.cpp Fri Mar 7 00:08:31 2014
> @@ -704,6 +704,6 @@ bool Filler::delayHasHazard(const Machin
>
> bool Filler::terminateSearch(const MachineInstr &Candidate) const {
> return (Candidate.isTerminator() || Candidate.isCall() ||
> - Candidate.isLabel() || Candidate.isInlineAsm() ||
> + Candidate.isPosition() || Candidate.isInlineAsm() ||
> Candidate.hasUnmodeledSideEffects());
> }
>
> Modified: llvm/trunk/lib/Target/Mips/MipsSEFrameLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSEFrameLowering.cpp?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/Mips/MipsSEFrameLowering.cpp (original)
> +++ llvm/trunk/lib/Target/Mips/MipsSEFrameLowering.cpp Fri Mar 7 00:08:31 2014
> @@ -299,11 +299,10 @@ void MipsSEFrameLowering::emitPrologue(M
> TII.adjustStackPtr(SP, -StackSize, MBB, MBBI);
>
> // emit ".cfi_def_cfa_offset StackSize"
> - MCSymbol *AdjustSPLabel = MMI.getContext().CreateTempSymbol();
> - BuildMI(MBB, MBBI, dl,
> - TII.get(TargetOpcode::PROLOG_LABEL)).addSym(AdjustSPLabel);
> - MMI.addFrameInst(
> - MCCFIInstruction::createDefCfaOffset(AdjustSPLabel, -StackSize));
> + unsigned CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createDefCfaOffset(nullptr, -StackSize));
> + BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
>
> const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
>
> @@ -315,10 +314,6 @@ void MipsSEFrameLowering::emitPrologue(M
>
> // Iterate over list of callee-saved registers and emit .cfi_offset
> // directives.
> - MCSymbol *CSLabel = MMI.getContext().CreateTempSymbol();
> - BuildMI(MBB, MBBI, dl,
> - TII.get(TargetOpcode::PROLOG_LABEL)).addSym(CSLabel);
> -
> for (std::vector<CalleeSavedInfo>::const_iterator I = CSI.begin(),
> E = CSI.end(); I != E; ++I) {
> int64_t Offset = MFI->getObjectOffset(I->getFrameIdx());
> @@ -335,14 +330,21 @@ void MipsSEFrameLowering::emitPrologue(M
> if (!STI.isLittle())
> std::swap(Reg0, Reg1);
>
> - MMI.addFrameInst(
> - MCCFIInstruction::createOffset(CSLabel, Reg0, Offset));
> - MMI.addFrameInst(
> - MCCFIInstruction::createOffset(CSLabel, Reg1, Offset + 4));
> + unsigned CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createOffset(nullptr, Reg0, Offset));
> + BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> +
> + CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createOffset(nullptr, Reg1, Offset + 4));
> + BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> } else {
> // Reg is either in GPR32 or FGR32.
> - MMI.addFrameInst(MCCFIInstruction::createOffset(
> - CSLabel, MRI->getDwarfRegNum(Reg, 1), Offset));
> + unsigned CFIIndex = MMI.addFrameInst(MCCFIInstruction::createOffset(
> + nullptr, MRI->getDwarfRegNum(Reg, 1), Offset));
> + BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> }
> }
> }
> @@ -360,13 +362,13 @@ void MipsSEFrameLowering::emitPrologue(M
> }
>
> // Emit .cfi_offset directives for eh data registers.
> - MCSymbol *CSLabel2 = MMI.getContext().CreateTempSymbol();
> - BuildMI(MBB, MBBI, dl,
> - TII.get(TargetOpcode::PROLOG_LABEL)).addSym(CSLabel2);
> for (int I = 0; I < 4; ++I) {
> int64_t Offset = MFI->getObjectOffset(MipsFI->getEhDataRegFI(I));
> unsigned Reg = MRI->getDwarfRegNum(ehDataReg(I), true);
> - MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel2, Reg, Offset));
> + unsigned CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createOffset(nullptr, Reg, Offset));
> + BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> }
> }
>
> @@ -376,11 +378,10 @@ void MipsSEFrameLowering::emitPrologue(M
> BuildMI(MBB, MBBI, dl, TII.get(ADDu), FP).addReg(SP).addReg(ZERO);
>
> // emit ".cfi_def_cfa_register $fp"
> - MCSymbol *SetFPLabel = MMI.getContext().CreateTempSymbol();
> - BuildMI(MBB, MBBI, dl,
> - TII.get(TargetOpcode::PROLOG_LABEL)).addSym(SetFPLabel);
> - MMI.addFrameInst(MCCFIInstruction::createDefCfaRegister(
> - SetFPLabel, MRI->getDwarfRegNum(FP, true)));
> + unsigned CFIIndex = MMI.addFrameInst(MCCFIInstruction::createDefCfaRegister(
> + nullptr, MRI->getDwarfRegNum(FP, true)));
> + BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> }
> }
>
>
> Modified: llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp (original)
> +++ llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp Fri Mar 7 00:08:31 2014
> @@ -121,7 +121,8 @@ void PPCCodeEmitter::emitBasicBlock(Mach
> default:
> MCE.emitWordBE(getBinaryCodeForInstr(MI));
> break;
> - case TargetOpcode::PROLOG_LABEL:
> + case TargetOpcode::CFI_INSTRUCTION:
> + break;
> case TargetOpcode::EH_LABEL:
> MCE.emitLabel(MI.getOperand(0).getMCSymbol());
> break;
>
> Modified: llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp (original)
> +++ llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp Fri Mar 7 00:08:31 2014
> @@ -353,9 +353,6 @@ void PPCFrameLowering::emitPrologue(Mach
> assert((isDarwinABI || isSVR4ABI) &&
> "Currently only Darwin and SVR4 ABIs are supported for PowerPC.");
>
> - // Prepare for frame info.
> - MCSymbol *FrameLabel = 0;
> -
> // Scan the prolog, looking for an UPDATE_VRSAVE instruction. If we find it,
> // process it.
> if (!isSVR4ABI)
> @@ -561,36 +558,37 @@ void PPCFrameLowering::emitPrologue(Mach
> // Add the "machine moves" for the instructions we generated above, but in
> // reverse order.
> if (needsFrameMoves) {
> - // Mark effective beginning of when frame pointer becomes valid.
> - FrameLabel = MMI.getContext().CreateTempSymbol();
> - BuildMI(MBB, MBBI, dl, TII.get(PPC::PROLOG_LABEL)).addSym(FrameLabel);
> -
> // Show update of SP.
> assert(NegFrameSize);
> - MMI.addFrameInst(
> - MCCFIInstruction::createDefCfaOffset(FrameLabel, NegFrameSize));
> + unsigned CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createDefCfaOffset(nullptr, NegFrameSize));
> + BuildMI(MBB, MBBI, dl, TII.get(PPC::CFI_INSTRUCTION)).addCFIIndex(CFIIndex);
>
> if (HasFP) {
> unsigned Reg = MRI->getDwarfRegNum(FPReg, true);
> - MMI.addFrameInst(
> - MCCFIInstruction::createOffset(FrameLabel, Reg, FPOffset));
> + CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createOffset(nullptr, Reg, FPOffset));
> + BuildMI(MBB, MBBI, dl, TII.get(PPC::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> }
>
> if (HasBP) {
> unsigned Reg = MRI->getDwarfRegNum(BPReg, true);
> - MMI.addFrameInst(
> - MCCFIInstruction::createOffset(FrameLabel, Reg, BPOffset));
> + CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createOffset(nullptr, Reg, BPOffset));
> + BuildMI(MBB, MBBI, dl, TII.get(PPC::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> }
>
> if (MustSaveLR) {
> unsigned Reg = MRI->getDwarfRegNum(LRReg, true);
> - MMI.addFrameInst(
> - MCCFIInstruction::createOffset(FrameLabel, Reg, LROffset));
> + CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createOffset(nullptr, Reg, LROffset));
> + BuildMI(MBB, MBBI, dl, TII.get(PPC::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> }
> }
>
> - MCSymbol *ReadyLabel = 0;
> -
> // If there is a frame pointer, copy R1 into R31
> if (HasFP) {
> BuildMI(MBB, MBBI, dl, OrInst, FPReg)
> @@ -598,19 +596,17 @@ void PPCFrameLowering::emitPrologue(Mach
> .addReg(SPReg);
>
> if (needsFrameMoves) {
> - ReadyLabel = MMI.getContext().CreateTempSymbol();
> -
> // Mark effective beginning of when frame pointer is ready.
> - BuildMI(MBB, MBBI, dl, TII.get(PPC::PROLOG_LABEL)).addSym(ReadyLabel);
> -
> unsigned Reg = MRI->getDwarfRegNum(FPReg, true);
> - MMI.addFrameInst(MCCFIInstruction::createDefCfaRegister(ReadyLabel, Reg));
> + unsigned CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createDefCfaRegister(nullptr, Reg));
> +
> + BuildMI(MBB, MBBI, dl, TII.get(PPC::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> }
> }
>
> if (needsFrameMoves) {
> - MCSymbol *Label = HasFP ? ReadyLabel : FrameLabel;
> -
> // Add callee saved registers to move list.
> const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
> for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
> @@ -631,14 +627,18 @@ void PPCFrameLowering::emitPrologue(Mach
> // For 64-bit SVR4 when we have spilled CRs, the spill location
> // is SP+8, not a frame-relative slot.
> if (isSVR4ABI && isPPC64 && (PPC::CR2 <= Reg && Reg <= PPC::CR4)) {
> - MMI.addFrameInst(MCCFIInstruction::createOffset(
> - Label, MRI->getDwarfRegNum(PPC::CR2, true), 8));
> + unsigned CFIIndex = MMI.addFrameInst(MCCFIInstruction::createOffset(
> + nullptr, MRI->getDwarfRegNum(PPC::CR2, true), 8));
> + BuildMI(MBB, MBBI, dl, TII.get(PPC::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> continue;
> }
>
> int Offset = MFI->getObjectOffset(CSI[I].getFrameIdx());
> - MMI.addFrameInst(MCCFIInstruction::createOffset(
> - Label, MRI->getDwarfRegNum(Reg, true), Offset));
> + unsigned CFIIndex = MMI.addFrameInst(MCCFIInstruction::createOffset(
> + nullptr, MRI->getDwarfRegNum(Reg, true), Offset));
> + BuildMI(MBB, MBBI, dl, TII.get(PPC::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> }
> }
> }
>
> Modified: llvm/trunk/lib/Target/Sparc/DelaySlotFiller.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/DelaySlotFiller.cpp?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/Sparc/DelaySlotFiller.cpp (original)
> +++ llvm/trunk/lib/Target/Sparc/DelaySlotFiller.cpp Fri Mar 7 00:08:31 2014
> @@ -211,12 +211,8 @@ Filler::findDelayInstr(MachineBasicBlock
> if (I->isDebugValue())
> continue;
>
> -
> - if (I->hasUnmodeledSideEffects()
> - || I->isInlineAsm()
> - || I->isLabel()
> - || I->hasDelaySlot()
> - || I->isBundledWithSucc())
> + if (I->hasUnmodeledSideEffects() || I->isInlineAsm() || I->isPosition() ||
> + I->hasDelaySlot() || I->isBundledWithSucc())
> break;
>
> if (delayHasHazard(I, sawLoad, sawStore, RegDefs, RegUses)) {
>
> Modified: llvm/trunk/lib/Target/Sparc/SparcCodeEmitter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcCodeEmitter.cpp?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/Sparc/SparcCodeEmitter.cpp (original)
> +++ llvm/trunk/lib/Target/Sparc/SparcCodeEmitter.cpp Fri Mar 7 00:08:31 2014
> @@ -145,7 +145,8 @@ void SparcCodeEmitter::emitInstruction(M
> }
> break;
> }
> - case TargetOpcode::PROLOG_LABEL:
> + case TargetOpcode::CFI_INSTRUCTION:
> + break;
> case TargetOpcode::EH_LABEL: {
> MCE.emitLabel(MI->getOperand(0).getMCSymbol());
> break;
>
> Modified: llvm/trunk/lib/Target/Sparc/SparcFrameLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcFrameLowering.cpp?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/Sparc/SparcFrameLowering.cpp (original)
> +++ llvm/trunk/lib/Target/Sparc/SparcFrameLowering.cpp Fri Mar 7 00:08:31 2014
> @@ -104,23 +104,23 @@ void SparcFrameLowering::emitPrologue(Ma
>
> MachineModuleInfo &MMI = MF.getMMI();
> const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
> - MCSymbol *FrameLabel = MMI.getContext().CreateTempSymbol();
> - BuildMI(MBB, MBBI, dl, TII.get(SP::PROLOG_LABEL)).addSym(FrameLabel);
> -
> unsigned regFP = MRI->getDwarfRegNum(SP::I6, true);
>
> // Emit ".cfi_def_cfa_register 30".
> - MMI.addFrameInst(MCCFIInstruction::createDefCfaRegister(FrameLabel,
> - regFP));
> + unsigned CFIIndex =
> + MMI.addFrameInst(MCCFIInstruction::createDefCfaRegister(nullptr, regFP));
> + BuildMI(MBB, MBBI, dl, TII.get(SP::CFI_INSTRUCTION)).addCFIIndex(CFIIndex);
> +
> // Emit ".cfi_window_save".
> - MMI.addFrameInst(MCCFIInstruction::createWindowSave(FrameLabel));
> + CFIIndex = MMI.addFrameInst(MCCFIInstruction::createWindowSave(nullptr));
> + BuildMI(MBB, MBBI, dl, TII.get(SP::CFI_INSTRUCTION)).addCFIIndex(CFIIndex);
>
> unsigned regInRA = MRI->getDwarfRegNum(SP::I7, true);
> unsigned regOutRA = MRI->getDwarfRegNum(SP::O7, true);
> // Emit ".cfi_register 15, 31".
> - MMI.addFrameInst(MCCFIInstruction::createRegister(FrameLabel,
> - regOutRA,
> - regInRA));
> + CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createRegister(nullptr, regOutRA, regInRA));
> + BuildMI(MBB, MBBI, dl, TII.get(SP::CFI_INSTRUCTION)).addCFIIndex(CFIIndex);
> }
>
> void SparcFrameLowering::
>
> Modified: llvm/trunk/lib/Target/SystemZ/SystemZFrameLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZFrameLowering.cpp?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/SystemZ/SystemZFrameLowering.cpp (original)
> +++ llvm/trunk/lib/Target/SystemZ/SystemZFrameLowering.cpp Fri Mar 7 00:08:31 2014
> @@ -333,15 +333,14 @@ void SystemZFrameLowering::emitPrologue(
> llvm_unreachable("Couldn't skip over GPR saves");
>
> // Add CFI for the GPR saves.
> - MCSymbol *GPRSaveLabel = MMI.getContext().CreateTempSymbol();
> - BuildMI(MBB, MBBI, DL,
> - ZII->get(TargetOpcode::PROLOG_LABEL)).addSym(GPRSaveLabel);
> for (auto &Save : CSI) {
> unsigned Reg = Save.getReg();
> if (SystemZ::GR64BitRegClass.contains(Reg)) {
> int64_t Offset = SPOffsetFromCFA + RegSpillOffsets[Reg];
> - MMI.addFrameInst(MCCFIInstruction::createOffset(
> - GPRSaveLabel, MRI->getDwarfRegNum(Reg, true), Offset));
> + unsigned CFIIndex = MMI.addFrameInst(MCCFIInstruction::createOffset(
> + nullptr, MRI->getDwarfRegNum(Reg, true), Offset));
> + BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> }
> }
> }
> @@ -353,11 +352,10 @@ void SystemZFrameLowering::emitPrologue(
> emitIncrement(MBB, MBBI, DL, SystemZ::R15D, Delta, ZII);
>
> // Add CFI for the allocation.
> - MCSymbol *AdjustSPLabel = MMI.getContext().CreateTempSymbol();
> - BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::PROLOG_LABEL))
> - .addSym(AdjustSPLabel);
> - MMI.addFrameInst(MCCFIInstruction::createDefCfaOffset(
> - AdjustSPLabel, SPOffsetFromCFA + Delta));
> + unsigned CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createDefCfaOffset(nullptr, SPOffsetFromCFA + Delta));
> + BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> SPOffsetFromCFA += Delta;
> }
>
> @@ -367,12 +365,11 @@ void SystemZFrameLowering::emitPrologue(
> .addReg(SystemZ::R15D);
>
> // Add CFI for the new frame location.
> - MCSymbol *SetFPLabel = MMI.getContext().CreateTempSymbol();
> - BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::PROLOG_LABEL))
> - .addSym(SetFPLabel);
> unsigned HardFP = MRI->getDwarfRegNum(SystemZ::R11D, true);
> - MMI.addFrameInst(
> - MCCFIInstruction::createDefCfaRegister(SetFPLabel, HardFP));
> + unsigned CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createDefCfaRegister(nullptr, HardFP));
> + BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
>
> // Mark the FramePtr as live at the beginning of every block except
> // the entry block. (We'll have marked R11 as live on entry when
> @@ -382,7 +379,7 @@ void SystemZFrameLowering::emitPrologue(
> }
>
> // Skip over the FPR saves.
> - MCSymbol *FPRSaveLabel = 0;
> + SmallVector<unsigned, 8> CFIIndexes;
> for (auto &Save : CSI) {
> unsigned Reg = Save.getReg();
> if (SystemZ::FP64BitRegClass.contains(Reg)) {
> @@ -394,19 +391,19 @@ void SystemZFrameLowering::emitPrologue(
> llvm_unreachable("Couldn't skip over FPR save");
>
> // Add CFI for the this save.
> - if (!FPRSaveLabel)
> - FPRSaveLabel = MMI.getContext().CreateTempSymbol();
> unsigned DwarfReg = MRI->getDwarfRegNum(Reg, true);
> int64_t Offset = getFrameIndexOffset(MF, Save.getFrameIdx());
> - MMI.addFrameInst(MCCFIInstruction::createOffset(
> - FPRSaveLabel, DwarfReg, SPOffsetFromCFA + Offset));
> + unsigned CFIIndex = MMI.addFrameInst(MCCFIInstruction::createOffset(
> + nullptr, DwarfReg, SPOffsetFromCFA + Offset));
> + CFIIndexes.push_back(CFIIndex);
> }
> }
> // Complete the CFI for the FPR saves, modelling them as taking effect
> // after the last save.
> - if (FPRSaveLabel)
> - BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::PROLOG_LABEL))
> - .addSym(FPRSaveLabel);
> + for (auto CFIIndex : CFIIndexes) {
> + BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> + }
> }
>
> void SystemZFrameLowering::emitEpilogue(MachineFunction &MF,
>
> Modified: llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp Fri Mar 7 00:08:31 2014
> @@ -1115,7 +1115,8 @@ void Emitter<CodeEmitter>::emitInstructi
> if (MI.getOperand(0).getSymbolName()[0])
> report_fatal_error("JIT does not support inline asm!");
> break;
> - case TargetOpcode::PROLOG_LABEL:
> + case TargetOpcode::CFI_INSTRUCTION:
> + break;
> case TargetOpcode::GC_LABEL:
> case TargetOpcode::EH_LABEL:
> MCE.emitLabel(MI.getOperand(0).getMCSymbol());
>
> Modified: llvm/trunk/lib/Target/X86/X86FrameLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FrameLowering.cpp?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86FrameLowering.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86FrameLowering.cpp Fri Mar 7 00:08:31 2014
> @@ -304,12 +304,14 @@ static bool isEAXLiveIn(MachineFunction
> return false;
> }
>
> -void X86FrameLowering::emitCalleeSavedFrameMoves(MachineFunction &MF,
> - MCSymbol *Label,
> - unsigned FramePtr) const {
> +void X86FrameLowering::emitCalleeSavedFrameMoves(
> + MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, DebugLoc DL,
> + unsigned FramePtr) const {
> + MachineFunction &MF = *MBB.getParent();
> MachineFrameInfo *MFI = MF.getFrameInfo();
> MachineModuleInfo &MMI = MF.getMMI();
> const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
> + const X86InstrInfo &TII = *TM.getInstrInfo();
>
> // Add callee saved registers to move list.
> const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
> @@ -363,7 +365,9 @@ void X86FrameLowering::emitCalleeSavedFr
> continue;
>
> unsigned DwarfReg = MRI->getDwarfRegNum(Reg, true);
> - MMI.addFrameInst(MCCFIInstruction::createOffset(Label, DwarfReg, Offset));
> + unsigned CFIIndex =
> + MMI.addFrameInst(MCCFIInstruction::createOffset(0, DwarfReg, Offset));
> + BuildMI(MBB, MBBI, DL, TII.get(X86::CFI_INSTRUCTION)).addCFIIndex(CFIIndex);
> }
> }
>
> @@ -503,19 +507,19 @@ void X86FrameLowering::emitPrologue(Mach
>
> if (needsFrameMoves) {
> // Mark the place where EBP/RBP was saved.
> - MCSymbol *FrameLabel = MMI.getContext().CreateTempSymbol();
> - BuildMI(MBB, MBBI, DL, TII.get(X86::PROLOG_LABEL))
> - .addSym(FrameLabel);
> -
> // Define the current CFA rule to use the provided offset.
> assert(StackSize);
> - MMI.addFrameInst(
> - MCCFIInstruction::createDefCfaOffset(FrameLabel, 2 * stackGrowth));
> + unsigned CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createDefCfaOffset(0, 2 * stackGrowth));
> + BuildMI(MBB, MBBI, DL, TII.get(X86::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
>
> // Change the rule for the FramePtr to be an "offset" rule.
> unsigned DwarfFramePtr = RegInfo->getDwarfRegNum(FramePtr, true);
> - MMI.addFrameInst(MCCFIInstruction::createOffset(FrameLabel, DwarfFramePtr,
> - 2 * stackGrowth));
> + CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createOffset(0, DwarfFramePtr, 2 * stackGrowth));
> + BuildMI(MBB, MBBI, DL, TII.get(X86::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> }
>
> // Update EBP with the new base value.
> @@ -526,14 +530,12 @@ void X86FrameLowering::emitPrologue(Mach
>
> if (needsFrameMoves) {
> // Mark effective beginning of when frame pointer becomes valid.
> - MCSymbol *FrameLabel = MMI.getContext().CreateTempSymbol();
> - BuildMI(MBB, MBBI, DL, TII.get(X86::PROLOG_LABEL))
> - .addSym(FrameLabel);
> -
> // Define the current CFA to use the EBP/RBP register.
> unsigned DwarfFramePtr = RegInfo->getDwarfRegNum(FramePtr, true);
> - MMI.addFrameInst(
> - MCCFIInstruction::createDefCfaRegister(FrameLabel, DwarfFramePtr));
> + unsigned CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createDefCfaRegister(0, DwarfFramePtr));
> + BuildMI(MBB, MBBI, DL, TII.get(X86::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> }
>
> // Mark the FramePtr as live-in in every block except the entry.
> @@ -557,13 +559,12 @@ void X86FrameLowering::emitPrologue(Mach
>
> if (!HasFP && needsFrameMoves) {
> // Mark callee-saved push instruction.
> - MCSymbol *Label = MMI.getContext().CreateTempSymbol();
> - BuildMI(MBB, MBBI, DL, TII.get(X86::PROLOG_LABEL)).addSym(Label);
> -
> // Define the current CFA rule to use the provided offset.
> assert(StackSize);
> - MMI.addFrameInst(
> - MCCFIInstruction::createDefCfaOffset(Label, StackOffset));
> + unsigned CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createDefCfaOffset(nullptr, StackOffset));
> + BuildMI(MBB, MBBI, DL, TII.get(X86::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> StackOffset += stackGrowth;
> }
> }
> @@ -692,20 +693,19 @@ void X86FrameLowering::emitPrologue(Mach
>
> if (( (!HasFP && NumBytes) || PushedRegs) && needsFrameMoves) {
> // Mark end of stack pointer adjustment.
> - MCSymbol *Label = MMI.getContext().CreateTempSymbol();
> - BuildMI(MBB, MBBI, DL, TII.get(X86::PROLOG_LABEL))
> - .addSym(Label);
> -
> if (!HasFP && NumBytes) {
> // Define the current CFA rule to use the provided offset.
> assert(StackSize);
> - MMI.addFrameInst(MCCFIInstruction::createDefCfaOffset(
> - Label, -StackSize + stackGrowth));
> + unsigned CFIIndex = MMI.addFrameInst(
> + MCCFIInstruction::createDefCfaOffset(0, -StackSize + stackGrowth));
> +
> + BuildMI(MBB, MBBI, DL, TII.get(X86::CFI_INSTRUCTION))
> + .addCFIIndex(CFIIndex);
> }
>
> // Emit DWARF info specifying the offsets of the callee-saved registers.
> if (PushedRegs)
> - emitCalleeSavedFrameMoves(MF, Label, HasFP ? FramePtr : StackPtr);
> + emitCalleeSavedFrameMoves(MBB, MBBI, DL, HasFP ? FramePtr : StackPtr);
> }
> }
>
>
> Modified: llvm/trunk/lib/Target/X86/X86FrameLowering.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FrameLowering.h?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86FrameLowering.h (original)
> +++ llvm/trunk/lib/Target/X86/X86FrameLowering.h Fri Mar 7 00:08:31 2014
> @@ -34,7 +34,8 @@ public:
> TM(tm), STI(sti) {
> }
>
> - void emitCalleeSavedFrameMoves(MachineFunction &MF, MCSymbol *Label,
> + void emitCalleeSavedFrameMoves(MachineBasicBlock &MBB,
> + MachineBasicBlock::iterator MBBI, DebugLoc DL,
> unsigned FramePtr) const;
>
> /// emitProlog/emitEpilog - These methods insert prolog and epilog code into
>
> Modified: llvm/trunk/lib/Target/XCore/XCoreFrameLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreFrameLowering.cpp?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/XCore/XCoreFrameLowering.cpp (original)
> +++ llvm/trunk/lib/Target/XCore/XCoreFrameLowering.cpp Fri Mar 7 00:08:31 2014
> @@ -62,29 +62,27 @@ static void EmitDefCfaRegister(MachineBa
> MachineBasicBlock::iterator MBBI, DebugLoc dl,
> const TargetInstrInfo &TII,
> MachineModuleInfo *MMI, unsigned DRegNum) {
> - MCSymbol *Label = MMI->getContext().CreateTempSymbol();
> - BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(Label);
> - MMI->addFrameInst(MCCFIInstruction::createDefCfaRegister(Label, DRegNum));
> + unsigned CFIIndex = MMI->addFrameInst(
> + MCCFIInstruction::createDefCfaRegister(nullptr, DRegNum));
> + BuildMI(MBB, MBBI, dl, TII.get(XCore::CFI_INSTRUCTION)).addCFIIndex(CFIIndex);
> }
>
> static void EmitDefCfaOffset(MachineBasicBlock &MBB,
> MachineBasicBlock::iterator MBBI, DebugLoc dl,
> const TargetInstrInfo &TII,
> MachineModuleInfo *MMI, int Offset) {
> - MCSymbol *Label = MMI->getContext().CreateTempSymbol();
> - BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(Label);
> - MMI->addFrameInst(MCCFIInstruction::createDefCfaOffset(Label, -Offset));
> + unsigned CFIIndex =
> + MMI->addFrameInst(MCCFIInstruction::createDefCfaOffset(nullptr, -Offset));
> + BuildMI(MBB, MBBI, dl, TII.get(XCore::CFI_INSTRUCTION)).addCFIIndex(CFIIndex);
> }
>
> static void EmitCfiOffset(MachineBasicBlock &MBB,
> MachineBasicBlock::iterator MBBI, DebugLoc dl,
> const TargetInstrInfo &TII, MachineModuleInfo *MMI,
> - unsigned DRegNum, int Offset, MCSymbol *Label) {
> - if (!Label) {
> - Label = MMI->getContext().CreateTempSymbol();
> - BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(Label);
> - }
> - MMI->addFrameInst(MCCFIInstruction::createOffset(Label, DRegNum, Offset));
> + unsigned DRegNum, int Offset) {
> + unsigned CFIIndex = MMI->addFrameInst(
> + MCCFIInstruction::createOffset(nullptr, DRegNum, Offset));
> + BuildMI(MBB, MBBI, dl, TII.get(XCore::CFI_INSTRUCTION)).addCFIIndex(CFIIndex);
> }
>
> /// The SP register is moved in steps of 'MaxImmU16' towards the bottom of the
> @@ -262,7 +260,7 @@ void XCoreFrameLowering::emitPrologue(Ma
> if (emitFrameMoves) {
> EmitDefCfaOffset(MBB, MBBI, dl, TII, MMI, Adjusted*4);
> unsigned DRegNum = MRI->getDwarfRegNum(XCore::LR, true);
> - EmitCfiOffset(MBB, MBBI, dl, TII, MMI, DRegNum, 0, NULL);
> + EmitCfiOffset(MBB, MBBI, dl, TII, MMI, DRegNum, 0);
> }
> }
>
> @@ -287,7 +285,7 @@ void XCoreFrameLowering::emitPrologue(Ma
> MachineMemOperand::MOStore));
> if (emitFrameMoves) {
> unsigned DRegNum = MRI->getDwarfRegNum(SpillList[i].Reg, true);
> - EmitCfiOffset(MBB,MBBI,dl,TII,MMI, DRegNum, SpillList[i].Offset, NULL);
> + EmitCfiOffset(MBB, MBBI, dl, TII, MMI, DRegNum, SpillList[i].Offset);
> }
> }
>
> @@ -306,14 +304,14 @@ void XCoreFrameLowering::emitPrologue(Ma
>
> if (emitFrameMoves) {
> // Frame moves for callee saved.
> - std::vector<std::pair<MCSymbol*, CalleeSavedInfo> >&SpillLabels =
> - XFI->getSpillLabels();
> + auto SpillLabels = XFI->getSpillLabels();
> for (unsigned I = 0, E = SpillLabels.size(); I != E; ++I) {
> - MCSymbol *SpillLabel = SpillLabels[I].first;
> + MachineBasicBlock::iterator Pos = SpillLabels[I].first;
> + ++Pos;
> CalleeSavedInfo &CSI = SpillLabels[I].second;
> int Offset = MFI->getObjectOffset(CSI.getFrameIdx());
> unsigned DRegNum = MRI->getDwarfRegNum(CSI.getReg(), true);
> - EmitCfiOffset(MBB, MBBI, dl, TII, MMI, DRegNum, Offset, SpillLabel);
> + EmitCfiOffset(MBB, Pos, dl, TII, MMI, DRegNum, Offset);
> }
> if (XFI->hasEHSpillSlot()) {
> // The unwinder requires stack slot & CFI offsets for the exception info.
> @@ -323,10 +321,10 @@ void XCoreFrameLowering::emitPrologue(Ma
> assert(SpillList.size()==2 && "Unexpected SpillList size");
> EmitCfiOffset(MBB, MBBI, dl, TII, MMI,
> MRI->getDwarfRegNum(SpillList[0].Reg, true),
> - SpillList[0].Offset, NULL);
> + SpillList[0].Offset);
> EmitCfiOffset(MBB, MBBI, dl, TII, MMI,
> MRI->getDwarfRegNum(SpillList[1].Reg, true),
> - SpillList[1].Offset, NULL);
> + SpillList[1].Offset);
> }
> }
> }
> @@ -427,9 +425,9 @@ spillCalleeSavedRegisters(MachineBasicBl
> const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
> TII.storeRegToStackSlot(MBB, MI, Reg, true, it->getFrameIdx(), RC, TRI);
> if (emitFrameMoves) {
> - MCSymbol *SaveLabel = MF->getContext().CreateTempSymbol();
> - BuildMI(MBB, MI, DL, TII.get(XCore::PROLOG_LABEL)).addSym(SaveLabel);
> - XFI->getSpillLabels().push_back(std::make_pair(SaveLabel, *it));
> + auto Store = MI;
> + --Store;
> + XFI->getSpillLabels().push_back(std::make_pair(Store, *it));
> }
> }
> return true;
>
> Modified: llvm/trunk/lib/Target/XCore/XCoreMachineFunctionInfo.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreMachineFunctionInfo.h?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/XCore/XCoreMachineFunctionInfo.h (original)
> +++ llvm/trunk/lib/Target/XCore/XCoreMachineFunctionInfo.h Fri Mar 7 00:08:31 2014
> @@ -37,7 +37,8 @@ class XCoreFunctionInfo : public Machine
> bool ReturnStackOffsetSet;
> int VarArgsFrameIndex;
> mutable int CachedEStackSize;
> - std::vector<std::pair<MCSymbol*, CalleeSavedInfo> > SpillLabels;
> + std::vector<std::pair<MachineBasicBlock::iterator, CalleeSavedInfo>>
> + SpillLabels;
>
> public:
> XCoreFunctionInfo() :
> @@ -95,7 +96,8 @@ public:
>
> bool isLargeFrame(const MachineFunction &MF) const;
>
> - std::vector<std::pair<MCSymbol*, CalleeSavedInfo> > &getSpillLabels() {
> + std::vector<std::pair<MachineBasicBlock::iterator, CalleeSavedInfo>> &
> + getSpillLabels() {
> return SpillLabels;
> }
> };
>
> Modified: llvm/trunk/test/CodeGen/AArch64/pic-eh-stubs.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/pic-eh-stubs.ll?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/AArch64/pic-eh-stubs.ll (original)
> +++ llvm/trunk/test/CodeGen/AArch64/pic-eh-stubs.ll Fri Mar 7 00:08:31 2014
> @@ -10,8 +10,8 @@
> ; ... referring indirectly to stubs for its typeinfo ...
> ; CHECK: // @TType Encoding = indirect pcrel sdata8
> ; ... one of which is "int"'s typeinfo
> -; CHECK: .Ltmp9:
> -; CHECK-NEXT: .xword .L_ZTIi.DW.stub-.Ltmp9
> +; CHECK: .Ltmp7:
> +; CHECK-NEXT: .xword .L_ZTIi.DW.stub-.Ltmp7
>
> ; .. and which is properly defined (in a writable section for the dynamic loader) later.
> ; CHECK: .section .data.rel,"aw"
>
> Modified: llvm/trunk/test/CodeGen/ARM/indirectbr-2.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/indirectbr-2.ll?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/ARM/indirectbr-2.ll (original)
> +++ llvm/trunk/test/CodeGen/ARM/indirectbr-2.ll Fri Mar 7 00:08:31 2014
> @@ -9,7 +9,7 @@
> ; statement shouldn't be implicitly defined.
>
> ; CHECK-LABEL: func:
> -; CHECK: Ltmp3: @ Block address taken
> +; CHECK: Ltmp1: @ Block address taken
> ; CHECK-NOT: @ implicit-def: R0
> ; CHECK: @ 4-byte Reload
>
>
> Modified: llvm/trunk/test/CodeGen/ARM/indirectbr.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/indirectbr.ll?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/ARM/indirectbr.ll (original)
> +++ llvm/trunk/test/CodeGen/ARM/indirectbr.ll Fri Mar 7 00:08:31 2014
> @@ -69,7 +69,7 @@ L1:
> store i8* blockaddress(@foo, %L5), i8** @nextaddr, align 4
> ret i32 %res.3
> }
> -; ARM: .long Ltmp1-(LPC{{.*}}+8)
> -; THUMB: .long Ltmp1-(LPC{{.*}}+4)
> +; ARM: .long Ltmp0-(LPC{{.*}}+8)
> +; THUMB: .long Ltmp0-(LPC{{.*}}+4)
> ; THUMB: .long _nextaddr-([[NEXTADDR_PCBASE]]+4)
> -; THUMB2: .long Ltmp1
> +; THUMB2: .long Ltmp0
>
> Modified: llvm/trunk/test/CodeGen/X86/pr10420.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr10420.ll?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/pr10420.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/pr10420.ll Fri Mar 7 00:08:31 2014
> @@ -18,7 +18,7 @@ define void @bar() {
> ; CHECK-NEXT: Ltmp0:
>
> ; CHECK: _bar: ## @bar
> -; CHECK-NEXT: Ltmp3:
> +; CHECK-NEXT: Ltmp2:
>
> ; CHECK: ## FDE CIE Offset
> ; CHECK-NEXT: .long
> @@ -30,7 +30,7 @@ define void @bar() {
> ; CHECK: ## FDE CIE Offset
> ; CHECK-NEXT: .long
> ; CHECK-NEXT: Ltmp[[NUM1:[0-9]*]]:
> -; CHECK-NEXT: Ltmp[[NUM2:[0-9]*]] = Ltmp3-Ltmp[[NUM1]] ## FDE initial location
> +; CHECK-NEXT: Ltmp[[NUM2:[0-9]*]] = Ltmp2-Ltmp[[NUM1]] ## FDE initial location
> ; CHECK-NEXT: {{.quad|.long}} Ltmp[[NUM2]]
>
>
> @@ -38,7 +38,7 @@ define void @bar() {
> ; OLD-NEXT: Ltmp0:
>
> ; OLD: _bar: ## @bar
> -; OLD-NEXT: Ltmp3:
> +; OLD-NEXT: Ltmp2:
>
> ; OLD: ## FDE CIE Offset
> ; OLD-NEXT: .long
> @@ -48,4 +48,4 @@ define void @bar() {
> ; OLD: ## FDE CIE Offset
> ; OLD-NEXT: .long
> ; OLD-NEXT: Ltmp[[NUM1:[0-9]*]]:
> -; OLD-NEXT: {{.quad|.long}} Ltmp3-Ltmp[[NUM1]] ## FDE initial location
> +; OLD-NEXT: {{.quad|.long}} Ltmp2-Ltmp[[NUM1]] ## FDE initial location
>
> Modified: llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp (original)
> +++ llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp Fri Mar 7 00:08:31 2014
> @@ -152,7 +152,8 @@ FindUniqueOperandCommands(std::vector<st
>
> for (unsigned i = 0, e = NumberedInstructions->size(); i != e; ++i) {
> const AsmWriterInst *Inst = getAsmWriterInstByID(i);
> - if (Inst == 0) continue; // PHI, INLINEASM, PROLOG_LABEL, etc.
> + if (Inst == 0)
> + continue; // PHI, INLINEASM, CFI_INSTRUCTION, etc.
>
> std::string Command;
> if (Inst->Operands.empty())
>
> Modified: llvm/trunk/utils/TableGen/CodeGenTarget.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenTarget.cpp?rev=203204&r1=203203&r2=203204&view=diff
> ==============================================================================
> --- llvm/trunk/utils/TableGen/CodeGenTarget.cpp (original)
> +++ llvm/trunk/utils/TableGen/CodeGenTarget.cpp Fri Mar 7 00:08:31 2014
> @@ -294,7 +294,7 @@ GetInstByName(const char *Name,
> void CodeGenTarget::ComputeInstrsByEnum() const {
> // The ordering here must match the ordering in TargetOpcodes.h.
> static const char *const FixedInstrs[] = {
> - "PHI", "INLINEASM", "PROLOG_LABEL", "EH_LABEL",
> + "PHI", "INLINEASM", "CFI_INSTRUCTION", "EH_LABEL",
> "GC_LABEL", "KILL", "EXTRACT_SUBREG", "INSERT_SUBREG",
> "IMPLICIT_DEF", "SUBREG_TO_REG", "COPY_TO_REGCLASS", "DBG_VALUE",
> "REG_SEQUENCE", "COPY", "BUNDLE", "LIFETIME_START",
>
>
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