[PATCH] AARCH64_BE load/store rules fix for ARM ABI

[Tim Northover]

>   Yes. This is my point.

Oh good, at least we're communicating properly!

> Could you please give me some examples to articulate it is "madness". :-)

Well, take a look at the file I attached for example. Running "opt" on
it allows inlining and the real alignment of 8 is propagated to the
load. As a result, you'd get different results depending on
optimisation level (if we used "ld1 {v0.4h}").

> If we don't use ld1 for "align 2" case, which instruction we should
> use? ldr requires total size alignment, otherwise exception would
> be raised if strict alignment is enabled.

If we decided to support strict alignment mode efficiently, we would
probably want to emit an "ld1 {v0.8b}" (i.e. always use the .8b or
.16b version), since that's got the same semantics as ldr. At the
moment neither gets emitted so it's not really a pressing issue (it
would be part of "support strict align" rather than "support
big-endian" in my view).

Cheers.

Tim.
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