[PATCH] AARCH64_BE load/store rules fix for ARM ABI

[Jiangning Liu]

  Hi Tim,

  > I'm afraid I still can't quite see what you're proposing. First, are you sure you mean "alignment" in your post? If so, you seem to be advocating treating these two instructions differently:
  >
  > %val = load <4 x i16>* %addr, align 8 ; gets ldr
  > %val = load <4 x i16>* %addr, align 2 ; gets ld1
  > My opinion is that would be madness, and almost impossible to produce a consistent code from. I'll try to think up some examples if you like, but just want to make sure I understand what you're saying first.

  Yes. This is my point. Could you please give me some examples to articulate it is "madness". :-)

  If we don't use ld1 for "align 2" case, which instruction we should use? ldr requires total size alignment, otherwise exception would be raised if strict alignment is enabled.

  Thanks,
  -Jiangning

http://llvm-reviews.chandlerc.com/D2884