[PATCH] Adds Cortex-A53 and Cortex-A57 subtargets.

[Ana Pazos]

Hi Dave,

Thanks for working on this. LGTM.

Tim and Jiangning, are you ok with this change?

If there is any concern that SchedModel will be turned on by default for mcpu=cortex-a53, we can disable it by setting EnableSchedModel to false for AArch64 target, till Dave finishes the Neon implementation and we get some performance numbers.

What do you think?

Thanks,
Ana.

-----Original Message-----
From: Dave Estes [mailto:cestes at codeaurora.org] 
Sent: Wednesday, February 19, 2014 8:11 AM
To: apazos at codeaurora.org; mcrosier at codeaurora.org; atrick at apple.com; cestes at codeaurora.org; t.p.northover at gmail.com
Cc: llvm-commits at cs.uiuc.edu; amara.emerson at arm.com
Subject: [PATCH] Adds Cortex-A53 and Cortex-A57 subtargets.

Hi apazos, mcrosier, atrick,

This is a work in progress to provide a machine description for the
Cortex-A53 subtarget in the AArch64 backend.

This patch lays the ground work to annotate each AArch64 instruction (no NEON yet) with a list of SchedReadWrite types. The patch also provides the Cortex-A53 processor resources, maps those the the default SchedReadWrites, and provides basic latency. NEON support will be added in a subsequent patch with proper forwarding logic soon the likely next patch.

Verification was doneg by setting the pre-RA scheduler to linearize to better gauge the effect of the MIScheduler. Even without modeling the forward logic, the results show a modest improvement for Cortex-A53.

http://llvm-reviews.chandlerc.com/D2829

Files:
  lib/Target/AArch64/AArch64.td
  lib/Target/AArch64/AArch64InstrInfo.td
  lib/Target/AArch64/AArch64Schedule.td
  lib/Target/AArch64/AArch64ScheduleA53.td
  lib/Target/AArch64/AArch64Subtarget.h