[PATCH] [AArch64]Add support for spilling FPR8/FPR16 registers

[Hao Liu]

  Hi Tim,

  Thanks very much for such a simple test case. It really works very well.

  I've attached the new patch with test cases.

  Thanks,
  -Hao

Hi t.p.northover,

http://llvm-reviews.chandlerc.com/D2734

CHANGE SINCE LAST DIFF
  http://llvm-reviews.chandlerc.com/D2734?vs=6977&id=7016#toc

Files:
  lib/Target/AArch64/AArch64InstrInfo.cpp
  test/CodeGen/AArch64/neon-spill-fpr8-fpr16.ll

Index: lib/Target/AArch64/AArch64InstrInfo.cpp
===================================================================
--- lib/Target/AArch64/AArch64InstrInfo.cpp
+++ lib/Target/AArch64/AArch64InstrInfo.cpp
@@ -487,6 +487,10 @@
     default:
       llvm_unreachable("Unknown size for regclass");
     }
+  } else if (AArch64::FPR8RegClass.hasSubClassEq(RC)) {
+    StoreOp = AArch64::LSFP8_STR;
+  } else if (AArch64::FPR16RegClass.hasSubClassEq(RC)) {
+    StoreOp = AArch64::LSFP16_STR;
   } else if (RC->hasType(MVT::f32) || RC->hasType(MVT::f64) ||
              RC->hasType(MVT::f128)) {
     switch (RC->getSize()) {
@@ -553,6 +557,10 @@
     default:
       llvm_unreachable("Unknown size for regclass");
     }
+  } else if (AArch64::FPR8RegClass.hasSubClassEq(RC)) {
+    LoadOp = AArch64::LSFP8_LDR;
+  } else if (AArch64::FPR16RegClass.hasSubClassEq(RC)) {
+    LoadOp = AArch64::LSFP16_LDR;
   } else if (RC->hasType(MVT::f32) || RC->hasType(MVT::f64) ||
              RC->hasType(MVT::f128)) {
     switch (RC->getSize()) {
Index: test/CodeGen/AArch64/neon-spill-fpr8-fpr16.ll
===================================================================
--- /dev/null
+++ test/CodeGen/AArch64/neon-spill-fpr8-fpr16.ll
@@ -0,0 +1,30 @@
+; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+neon < %s | FileCheck %s
+
+; This file tests the spill of FPR8/FPR16. The volatile loads/stores force the
+; allocator to keep the value live until it's needed.
+
+%bigtype_v1i8 = type [20 x <1 x i8>]
+
+define void @spill_fpr8(%bigtype_v1i8* %addr) {
+; CHECK-LABEL: spill_fpr8:
+; CHECK: 1-byte Folded Spill
+; CHECK: 1-byte Folded Reload
+  %val1 = load volatile %bigtype_v1i8* %addr
+  %val2 = load volatile %bigtype_v1i8* %addr
+  store volatile %bigtype_v1i8 %val1, %bigtype_v1i8* %addr
+  store volatile %bigtype_v1i8 %val2, %bigtype_v1i8* %addr
+  ret void
+}
+
+%bigtype_v1i16 = type [20 x <1 x i16>]
+
+define void @spill_fpr16(%bigtype_v1i16* %addr) {
+; CHECK-LABEL: spill_fpr16:
+; CHECK: 2-byte Folded Spill
+; CHECK: 2-byte Folded Reload
+  %val1 = load volatile %bigtype_v1i16* %addr
+  %val2 = load volatile %bigtype_v1i16* %addr
+  store volatile %bigtype_v1i16 %val1, %bigtype_v1i16* %addr
+  store volatile %bigtype_v1i16 %val2, %bigtype_v1i16* %addr
+  ret void
+}
\ No newline at end of file
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D2734.2.patch
Type: text/x-patch
Size: 2302 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20140211/1d0dbf1a/attachment.bin>