[llvm] r199498 - [mips][msa] Correct pattern for LSA

Daniel Sanders daniel.sanders at imgtec.com
Fri Jan 17 07:40:05 PST 2014


Author: dsanders
Date: Fri Jan 17 09:40:05 2014
New Revision: 199498

URL: http://llvm.org/viewvc/llvm-project?rev=199498&view=rev
Log:
[mips][msa] Correct pattern for LSA

Summary:
$rs and $rt were the wrong way round in the .td and the testcase wasn't
strict enough to detect the mistake.

Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D2554

Modified:
    llvm/trunk/lib/Target/Mips/MipsMSAInstrInfo.td
    llvm/trunk/test/CodeGen/Mips/msa/special.ll

Modified: llvm/trunk/lib/Target/Mips/MipsMSAInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsMSAInstrInfo.td?rev=199498&r1=199497&r2=199498&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsMSAInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/MipsMSAInstrInfo.td Fri Jan 17 09:40:05 2014
@@ -2297,8 +2297,8 @@ class LSA_DESC {
   dag OutOperandList = (outs GPR32Opnd:$rd);
   dag InOperandList = (ins GPR32Opnd:$rs, GPR32Opnd:$rt, LSAImm:$sa);
   string AsmString = "lsa\t$rd, $rs, $rt, $sa";
-  list<dag> Pattern = [(set GPR32Opnd:$rd, (add GPR32Opnd:$rs,
-                                                (shl GPR32Opnd:$rt,
+  list<dag> Pattern = [(set GPR32Opnd:$rd, (add GPR32Opnd:$rt,
+                                                (shl GPR32Opnd:$rs,
                                                      immZExt2Lsa:$sa)))];
   InstrItinClass Itinerary = NoItinerary;
 }

Modified: llvm/trunk/test/CodeGen/Mips/msa/special.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/msa/special.ll?rev=199498&r1=199497&r2=199498&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/msa/special.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/msa/special.ll Fri Jan 17 09:40:05 2014
@@ -11,7 +11,7 @@ entry:
 declare i32 @llvm.mips.lsa(i32, i32, i32) nounwind
 
 ; CHECK: llvm_mips_lsa_test:
-; CHECK: lsa {{\$[0-9]+}}, {{\$[0-9]+}}, {{\$[0-9]+}}, 2
+; CHECK: lsa {{\$[0-9]+}}, $5, $4, 2
 ; CHECK: .size llvm_mips_lsa_test
 
 define i32 @lsa_test(i32 %a, i32 %b) nounwind {
@@ -22,5 +22,5 @@ entry:
 }
 
 ; CHECK: lsa_test:
-; CHECK: lsa {{\$[0-9]+}}, {{\$[0-9]+}}, {{\$[0-9]+}}, 2
+; CHECK: lsa {{\$[0-9]+}}, $5, $4, 2
 ; CHECK: .size lsa_test





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