[llvm] r198757 - [x86] Fix JCXZ,JECXZ_32 for 16-bit mode

David Woodhouse dwmw2 at infradead.org
Wed Jan 8 04:58:12 PST 2014


Author: dwmw2
Date: Wed Jan  8 06:58:12 2014
New Revision: 198757

URL: http://llvm.org/viewvc/llvm-project?rev=198757&view=rev
Log:
[x86] Fix JCXZ,JECXZ_32 for 16-bit mode

JCXZ should have the 0x67 prefix only if we're in 32-bit mode, so make that
appropriately conditional. And JECXZ needs the prefix instead.

Modified:
    llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
    llvm/trunk/test/MC/X86/x86-16.s

Modified: llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp?rev=198757&r1=198756&r2=198757&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp Wed Jan  8 06:58:12 2014
@@ -1161,7 +1161,11 @@ void X86MCCodeEmitter::EmitOpcodePrefix(
 
   // Emit the address size opcode prefix as needed.
   bool need_address_override;
-  if (TSFlags & X86II::AdSize) {
+  // The AdSize prefix is only for 32-bit and 64-bit modes; in 16-bit mode we
+  // need the address override only for JECXZ instead. Since it's only one
+  // instruction, we special-case it rather than introducing an AdSize16 bit.
+  if ((!is16BitMode() && TSFlags & X86II::AdSize) ||
+      (is16BitMode() && MI.getOpcode() == X86::JECXZ_32)) {
     need_address_override = true;
   } else if (MemOperand == -1) {
     need_address_override = false;

Modified: llvm/trunk/test/MC/X86/x86-16.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86-16.s?rev=198757&r1=198756&r2=198757&view=diff
==============================================================================
--- llvm/trunk/test/MC/X86/x86-16.s (original)
+++ llvm/trunk/test/MC/X86/x86-16.s Wed Jan  8 06:58:12 2014
@@ -356,6 +356,14 @@ cmovnae	%bx,%bx
 lcalll $0x2, $0x1234
 
 
+L1:
+  jcxz L1
+// CHECK: jcxz L1
+// CHECK:   encoding: [0xe3,A]
+  jecxz L1
+// CHECK: jecxz L1
+// CHECK:   encoding: [0x67,0xe3,A]
+
 iret
 // CHECK: iretw
 // CHECK: encoding: [0xcf]





More information about the llvm-commits mailing list