[PATCH] Allow 0 offsets to left out for strbt / ldrbt in ARM mode.

[Tim Northover]

  Hi Joerg,

  This approach looks very dodgy to me; duplicating instruction encodings should be a last resort.

  Cheers.

  Tim


================
Comment at: lib/Target/ARM/ARMInstrInfo.td:2463-2464
@@ -2462,1 +2462,4 @@
 
+// LDRT_POST_0 should be an alias for LDRT_POST_IMM,
+// but the existing Thumb2 instruction confuses TableGen.
+def LDRT_POST_0 : AI2ldstidx<1, 0, 0, (outs GPR:$Rt, GPR:$Rn_wb),
----------------
How does it confuse TableGen? These instructions shouldn't overlap at all, since IsARM and IsThumb2 are mutually exclusive. What errors are you seeing?

My quick experiments suggest there's a different bug in how TableGen pairs up operands (the loop at CodeGenInstruction.cpp line 564). That seems to prevent a sane alias being written here. But I've not dug enough to work out just what yet. It's all rather hairy.


http://llvm-reviews.chandlerc.com/D2510