[llvm] r197052 - [arm] Implement ARM .arch directive.
Manman Ren
manman.ren at gmail.com
Wed Dec 11 10:50:41 PST 2013
This is breaking an internal bot:
Failing Tests (22):
LLVM :: MC/ARM/directive-arch-armv2.s
LLVM :: MC/ARM/directive-arch-armv2a.s
LLVM :: MC/ARM/directive-arch-armv3.s
LLVM :: MC/ARM/directive-arch-armv3m.s
LLVM :: MC/ARM/directive-arch-armv4.s
LLVM :: MC/ARM/directive-arch-armv4t.s
LLVM :: MC/ARM/directive-arch-armv5.s
LLVM :: MC/ARM/directive-arch-armv5t.s
LLVM :: MC/ARM/directive-arch-armv5te.s
LLVM :: MC/ARM/directive-arch-armv6-m.s
LLVM :: MC/ARM/directive-arch-armv6.s
LLVM :: MC/ARM/directive-arch-armv6j.s
LLVM :: MC/ARM/directive-arch-armv6t2.s
LLVM :: MC/ARM/directive-arch-armv6z.s
LLVM :: MC/ARM/directive-arch-armv6zk.s
LLVM :: MC/ARM/directive-arch-armv7-a.s
LLVM :: MC/ARM/directive-arch-armv7-m.s
LLVM :: MC/ARM/directive-arch-armv7-r.s
LLVM :: MC/ARM/directive-arch-armv7.s
LLVM :: MC/ARM/directive-arch-armv8-a.s
LLVM :: MC/ARM/directive-arch-iwmmxt.s
LLVM :: MC/ARM/directive-arch-iwmmxt2.s
--
Stack dump:
0. Program arguments: llvm-mc -arch=arm -filetype=obj
<stdin>: The file was not recognized as a valid object file
FileCheck error: '-' is empty.
Any idea what is wrong?
Thanks,
Manman
On Wed, Dec 11, 2013 at 9:16 AM, Logan Chien <tzuhsiang.chien at gmail.com>wrote:
> Author: logan
> Date: Wed Dec 11 11:16:25 2013
> New Revision: 197052
>
> URL: http://llvm.org/viewvc/llvm-project?rev=197052&view=rev
> Log:
> [arm] Implement ARM .arch directive.
>
> Added:
> llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMArchName.def
> llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMArchName.h
> llvm/trunk/test/MC/ARM/directive-arch-armv2.s
> llvm/trunk/test/MC/ARM/directive-arch-armv2a.s
> llvm/trunk/test/MC/ARM/directive-arch-armv3.s
> llvm/trunk/test/MC/ARM/directive-arch-armv3m.s
> llvm/trunk/test/MC/ARM/directive-arch-armv4.s
> llvm/trunk/test/MC/ARM/directive-arch-armv4t.s
> llvm/trunk/test/MC/ARM/directive-arch-armv5.s
> llvm/trunk/test/MC/ARM/directive-arch-armv5t.s
> llvm/trunk/test/MC/ARM/directive-arch-armv5te.s
> llvm/trunk/test/MC/ARM/directive-arch-armv6-m.s
> llvm/trunk/test/MC/ARM/directive-arch-armv6.s
> llvm/trunk/test/MC/ARM/directive-arch-armv6j.s
> llvm/trunk/test/MC/ARM/directive-arch-armv6t2.s
> llvm/trunk/test/MC/ARM/directive-arch-armv6z.s
> llvm/trunk/test/MC/ARM/directive-arch-armv6zk.s
> llvm/trunk/test/MC/ARM/directive-arch-armv7-a.s
> llvm/trunk/test/MC/ARM/directive-arch-armv7-m.s
> llvm/trunk/test/MC/ARM/directive-arch-armv7-r.s
> llvm/trunk/test/MC/ARM/directive-arch-armv7.s
> llvm/trunk/test/MC/ARM/directive-arch-armv8-a.s
> llvm/trunk/test/MC/ARM/directive-arch-iwmmxt.s
> llvm/trunk/test/MC/ARM/directive-arch-iwmmxt2.s
> Modified:
> llvm/trunk/include/llvm/MC/MCStreamer.h
> llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
> llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
>
> Modified: llvm/trunk/include/llvm/MC/MCStreamer.h
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCStreamer.h?rev=197052&r1=197051&r2=197052&view=diff
>
> ==============================================================================
> --- llvm/trunk/include/llvm/MC/MCStreamer.h (original)
> +++ llvm/trunk/include/llvm/MC/MCStreamer.h Wed Dec 11 11:16:25 2013
> @@ -93,6 +93,7 @@ public:
> virtual void emitAttribute(unsigned Attribute, unsigned Value) = 0;
> virtual void emitTextAttribute(unsigned Attribute, StringRef String) =
> 0;
> virtual void emitFPU(unsigned FPU) = 0;
> + virtual void emitArch(unsigned Arch) = 0;
> virtual void finishAttributeSection() = 0;
> };
>
>
> Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=197052&r1=197051&r2=197052&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Wed Dec 11
> 11:16:25 2013
> @@ -12,6 +12,7 @@
> #include "ARMFeatures.h"
> #include "llvm/MC/MCTargetAsmParser.h"
> #include "MCTargetDesc/ARMAddressingModes.h"
> +#include "MCTargetDesc/ARMArchName.h"
> #include "MCTargetDesc/ARMBaseInfo.h"
> #include "MCTargetDesc/ARMMCExpr.h"
> #include "llvm/ADT/BitVector.h"
> @@ -8006,7 +8007,19 @@ bool ARMAsmParser::parseDirectiveUnreq(S
> /// parseDirectiveArch
> /// ::= .arch token
> bool ARMAsmParser::parseDirectiveArch(SMLoc L) {
> - return true;
> + StringRef Arch = getParser().parseStringToEndOfStatement().trim();
> +
> + unsigned ID = StringSwitch<unsigned>(Arch)
> +#define ARM_ARCH_NAME(NAME, ID, DEFAULT_CPU_NAME, DEFAULT_CPU_ARCH) \
> + .Case(NAME, ARM::ID)
> +#include "MCTargetDesc/ARMArchName.def"
> + .Default(ARM::INVALID_ARCH);
> +
> + if (ID == ARM::INVALID_ARCH)
> + return Error(L, "Unknown arch name");
> +
> + getTargetStreamer().emitArch(ID);
> + return false;
> }
>
> /// parseDirectiveEabiAttr
>
> Added: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMArchName.def
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMArchName.def?rev=197052&view=auto
>
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMArchName.def (added)
> +++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMArchName.def Wed Dec 11
> 11:16:25 2013
> @@ -0,0 +1,45 @@
> +//===-- ARMArchName.def - List of the ARM arch names ------------*- C++
> -*-===//
> +//
> +// The LLVM Compiler Infrastructure
> +//
> +// This file is distributed under the University of Illinois Open Source
> +// License. See LICENSE.TXT for details.
> +//
>
> +//===----------------------------------------------------------------------===//
> +//
> +// This file contains the list of the supported ARM architecture names,
> +// i.e. the supported value for -march= option.
> +//
>
> +//===----------------------------------------------------------------------===//
> +
> +// NOTE: NO INCLUDE GUARD DESIRED!
> +
> +#ifndef ARM_ARCH_NAME
> +#error "You must define ARM_ARCH_NAME before including ARMArchName.def"
> +#endif
> +
> +// ARM_ARCH_NAME(NAME, ID, DEFAULT_CPU_NAME, DEFAULT_CPU_ARCH)
> +ARM_ARCH_NAME("armv2", ARMV2, "2", v4)
> +ARM_ARCH_NAME("armv2a", ARMV2A, "2A", v4)
> +ARM_ARCH_NAME("armv3", ARMV3, "3", v4)
> +ARM_ARCH_NAME("armv3m", ARMV3M, "3M", v4)
> +ARM_ARCH_NAME("armv4", ARMV4, "4", v4)
> +ARM_ARCH_NAME("armv4t", ARMV4T, "4T", v4T)
> +ARM_ARCH_NAME("armv5", ARMV5, "5", v5T)
> +ARM_ARCH_NAME("armv5t", ARMV5T, "5T", v5T)
> +ARM_ARCH_NAME("armv5te", ARMV5TE, "5TE", v5TE)
> +ARM_ARCH_NAME("armv6", ARMV6, "6", v6)
> +ARM_ARCH_NAME("armv6j", ARMV6J, "6J", v6)
> +ARM_ARCH_NAME("armv6t2", ARMV6T2, "6T2", v6T2)
> +ARM_ARCH_NAME("armv6z", ARMV6Z, "6Z", v6KZ)
> +ARM_ARCH_NAME("armv6zk", ARMV6ZK, "6ZK", v6KZ)
> +ARM_ARCH_NAME("armv6-m", ARMV6M, "6-M", v6_M)
> +ARM_ARCH_NAME("armv7", ARMV7, "7", v7)
> +ARM_ARCH_NAME("armv7-a", ARMV7A, "7-A", v7)
> +ARM_ARCH_NAME("armv7-r", ARMV7R, "7-R", v7)
> +ARM_ARCH_NAME("armv7-m", ARMV7M, "7-M", v7)
> +ARM_ARCH_NAME("armv8-a", ARMV8A, "8-A", v8)
> +ARM_ARCH_NAME("iwmmxt", IWMMXT, "iwmmxt", v5TE)
> +ARM_ARCH_NAME("iwmmxt2", IWMMXT2, "iwmmxt2", v5TE)
> +
> +#undef ARM_ARCH_NAME
>
> Added: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMArchName.h
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMArchName.h?rev=197052&view=auto
>
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMArchName.h (added)
> +++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMArchName.h Wed Dec 11
> 11:16:25 2013
> @@ -0,0 +1,26 @@
> +//===-- ARMArchName.h - List of the ARM arch names --------------*- C++
> -*-===//
> +//
> +// The LLVM Compiler Infrastructure
> +//
> +// This file is distributed under the University of Illinois Open Source
> +// License. See LICENSE.TXT for details.
> +//
>
> +//===----------------------------------------------------------------------===//
> +
> +#ifndef ARMARCHNAME_H
> +#define ARMARCHNAME_H
> +
> +namespace llvm {
> +namespace ARM {
> +
> +enum ArchKind {
> + INVALID_ARCH = 0
> +
> +#define ARM_ARCH_NAME(NAME, ID, DEFAULT_CPU_NAME, DEFAULT_CPU_ARCH) , ID
> +#include "ARMArchName.def"
> +};
> +
> +} // namespace ARM
> +} // namespace llvm
> +
> +#endif // ARMARCHNAME_H
>
> Modified: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp?rev=197052&r1=197051&r2=197052&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp Wed Dec 11
> 11:16:25 2013
> @@ -14,6 +14,7 @@
>
> //===----------------------------------------------------------------------===//
>
> #include "ARMBuildAttrs.h"
> +#include "ARMArchName.h"
> #include "ARMFPUName.h"
> #include "ARMRegisterInfo.h"
> #include "ARMUnwindOp.h"
> @@ -61,6 +62,42 @@ static const char *GetFPUName(unsigned I
> return NULL;
> }
>
> +static const char *GetArchName(unsigned ID) {
> + switch (ID) {
> + default:
> + llvm_unreachable("Unknown ARCH kind");
> + break;
> +#define ARM_ARCH_NAME(NAME, ID, DEFAULT_CPU_NAME, DEFAULT_CPU_ARCH) \
> + case ARM::ID: return NAME;
> +#include "ARMArchName.def"
> + }
> + return NULL;
> +}
> +
> +static const char *GetArchDefaultCPUName(unsigned ID) {
> + switch (ID) {
> + default:
> + llvm_unreachable("Unknown ARCH kind");
> + break;
> +#define ARM_ARCH_NAME(NAME, ID, DEFAULT_CPU_NAME, DEFAULT_CPU_ARCH) \
> + case ARM::ID: return DEFAULT_CPU_NAME;
> +#include "ARMArchName.def"
> + }
> + return NULL;
> +}
> +
> +static unsigned GetArchDefaultCPUArch(unsigned ID) {
> + switch (ID) {
> + default:
> + llvm_unreachable("Unknown ARCH kind");
> + break;
> +#define ARM_ARCH_NAME(NAME, ID, DEFAULT_CPU_NAME, DEFAULT_CPU_ARCH) \
> + case ARM::ID: return ARMBuildAttrs::DEFAULT_CPU_ARCH;
> +#include "ARMArchName.def"
> + }
> + return 0;
> +}
> +
> namespace {
>
> class ARMELFStreamer;
> @@ -82,6 +119,7 @@ class ARMTargetAsmStreamer : public ARMT
> virtual void switchVendor(StringRef Vendor);
> virtual void emitAttribute(unsigned Attribute, unsigned Value);
> virtual void emitTextAttribute(unsigned Attribute, StringRef String);
> + virtual void emitArch(unsigned Arch);
> virtual void emitFPU(unsigned FPU);
> virtual void finishAttributeSection();
>
> @@ -143,6 +181,9 @@ void ARMTargetAsmStreamer::emitTextAttri
> break;
> }
> }
> +void ARMTargetAsmStreamer::emitArch(unsigned Arch) {
> + OS << "\t.arch\t" << GetArchName(Arch) << "\n";
> +}
> void ARMTargetAsmStreamer::emitFPU(unsigned FPU) {
> OS << "\t.fpu\t" << GetFPUName(FPU) << "\n";
> }
> @@ -171,6 +212,7 @@ private:
>
> StringRef CurrentVendor;
> unsigned FPU;
> + unsigned Arch;
> SmallVector<AttributeItem, 64> Contents;
>
> const MCSection *AttributeSection;
> @@ -233,6 +275,7 @@ private:
> Contents.push_back(Item);
> }
>
> + void emitArchDefaultAttributes();
> void emitFPUDefaultAttributes();
>
> ARMELFStreamer &getStreamer();
> @@ -250,6 +293,7 @@ private:
> virtual void switchVendor(StringRef Vendor);
> virtual void emitAttribute(unsigned Attribute, unsigned Value);
> virtual void emitTextAttribute(unsigned Attribute, StringRef String);
> + virtual void emitArch(unsigned Arch);
> virtual void emitFPU(unsigned FPU);
> virtual void finishAttributeSection();
>
> @@ -258,7 +302,7 @@ private:
> public:
> ARMTargetELFStreamer()
> : ARMTargetStreamer(), CurrentVendor("aeabi"), FPU(ARM::INVALID_FPU),
> - AttributeSection(0) {
> + Arch(ARM::INVALID_ARCH), AttributeSection(0) {
> }
> };
>
> @@ -491,6 +535,96 @@ void ARMTargetELFStreamer::emitTextAttri
> StringRef Value) {
> setAttributeItem(Attribute, Value, /* OverwriteExisting= */ true);
> }
> +void ARMTargetELFStreamer::emitArch(unsigned Value) {
> + Arch = Value;
> +}
> +void ARMTargetELFStreamer::emitArchDefaultAttributes() {
> + using namespace ARMBuildAttrs;
> + setAttributeItem(CPU_name, GetArchDefaultCPUName(Arch), false);
> + setAttributeItem(CPU_arch, GetArchDefaultCPUArch(Arch), false);
> +
> + switch (Arch) {
> + case ARM::ARMV2:
> + case ARM::ARMV2A:
> + case ARM::ARMV3:
> + case ARM::ARMV3M:
> + case ARM::ARMV4:
> + case ARM::ARMV5:
> + setAttributeItem(ARM_ISA_use, Allowed, false);
> + break;
> +
> + case ARM::ARMV4T:
> + case ARM::ARMV5T:
> + case ARM::ARMV5TE:
> + case ARM::ARMV6:
> + case ARM::ARMV6J:
> + setAttributeItem(ARM_ISA_use, Allowed, false);
> + setAttributeItem(THUMB_ISA_use, Allowed, false);
> + break;
> +
> + case ARM::ARMV6T2:
> + setAttributeItem(ARM_ISA_use, Allowed, false);
> + setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
> + break;
> +
> + case ARM::ARMV6Z:
> + case ARM::ARMV6ZK:
> + setAttributeItem(ARM_ISA_use, Allowed, false);
> + setAttributeItem(THUMB_ISA_use, Allowed, false);
> + setAttributeItem(Virtualization_use, AllowTZ, false);
> + break;
> +
> + case ARM::ARMV6M:
> + setAttributeItem(CPU_arch_profile, MicroControllerProfile, false);
> + setAttributeItem(THUMB_ISA_use, Allowed, false);
> + break;
> +
> + case ARM::ARMV7:
> + setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
> + break;
> +
> + case ARM::ARMV7A:
> + setAttributeItem(CPU_arch_profile, ApplicationProfile, false);
> + setAttributeItem(ARM_ISA_use, Allowed, false);
> + setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
> + break;
> +
> + case ARM::ARMV7R:
> + setAttributeItem(CPU_arch_profile, RealTimeProfile, false);
> + setAttributeItem(ARM_ISA_use, Allowed, false);
> + setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
> + break;
> +
> + case ARM::ARMV7M:
> + setAttributeItem(CPU_arch_profile, MicroControllerProfile, false);
> + setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
> + break;
> +
> + case ARM::ARMV8A:
> + setAttributeItem(CPU_arch_profile, ApplicationProfile, false);
> + setAttributeItem(ARM_ISA_use, Allowed, false);
> + setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
> + setAttributeItem(MPextension_use, Allowed, false);
> + setAttributeItem(Virtualization_use, AllowTZVirtualization, false);
> + break;
> +
> + case ARM::IWMMXT:
> + setAttributeItem(ARM_ISA_use, Allowed, false);
> + setAttributeItem(THUMB_ISA_use, Allowed, false);
> + setAttributeItem(WMMX_arch, AllowWMMXv1, false);
> + break;
> +
> + case ARM::IWMMXT2:
> + setAttributeItem(ARM_ISA_use, Allowed, false);
> + setAttributeItem(THUMB_ISA_use, Allowed, false);
> + setAttributeItem(WMMX_arch, AllowWMMXv2, false);
> + break;
> +
> + default:
> + report_fatal_error("Unknown Arch: " + Twine(Arch));
> + break;
> + }
> +}
> void ARMTargetELFStreamer::emitFPU(unsigned Value) {
> FPU = Value;
> }
> @@ -597,6 +731,9 @@ void ARMTargetELFStreamer::finishAttribu
> if (FPU != ARM::INVALID_FPU)
> emitFPUDefaultAttributes();
>
> + if (Arch != ARM::INVALID_ARCH)
> + emitArchDefaultAttributes();
> +
> if (Contents.empty())
> return;
>
>
> Added: llvm/trunk/test/MC/ARM/directive-arch-armv2.s
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv2.s?rev=197052&view=auto
>
> ==============================================================================
> --- llvm/trunk/test/MC/ARM/directive-arch-armv2.s (added)
> +++ llvm/trunk/test/MC/ARM/directive-arch-armv2.s Wed Dec 11 11:16:25 2013
> @@ -0,0 +1,30 @@
> +@ Test the .arch directive for armv2
> +
> +@ This test case will check the default .ARM.attributes value for the
> +@ armv2 architecture.
> +
> +@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
> +@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
> +@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
> +@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
> +
> + .syntax unified
> + .arch armv2
> +
> +@ CHECK-ASM: .arch armv2
> +
> +@ CHECK-OBJ: Name: .ARM.attributes
> +@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
> +@ CHECK-OBJ: Flags [ (0x0)
> +@ CHECK-OBJ: ]
> +@ CHECK-OBJ: Address: 0x0
> +@ CHECK-OBJ: Offset: 0x34
> +@ CHECK-OBJ: Size: 23
> +@ CHECK-OBJ: Link: 0
> +@ CHECK-OBJ: Info: 0
> +@ CHECK-OBJ: AddressAlignment: 1
> +@ CHECK-OBJ: EntrySize: 0
> +@ CHECK-OBJ: SectionData (
> +@ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000
> |A....aeabi......|
> +@ CHECK-OBJ: 0010: 05320006 010801 |.2.....|
> +@ CHECK-OBJ: )
>
> Added: llvm/trunk/test/MC/ARM/directive-arch-armv2a.s
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv2a.s?rev=197052&view=auto
>
> ==============================================================================
> --- llvm/trunk/test/MC/ARM/directive-arch-armv2a.s (added)
> +++ llvm/trunk/test/MC/ARM/directive-arch-armv2a.s Wed Dec 11 11:16:25 2013
> @@ -0,0 +1,30 @@
> +@ Test the .arch directive for armv2a
> +
> +@ This test case will check the default .ARM.attributes value for the
> +@ armv2a architecture.
> +
> +@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
> +@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
> +@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
> +@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
> +
> + .syntax unified
> + .arch armv2a
> +
> +@ CHECK-ASM: .arch armv2a
> +
> +@ CHECK-OBJ: Name: .ARM.attributes
> +@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
> +@ CHECK-OBJ: Flags [ (0x0)
> +@ CHECK-OBJ: ]
> +@ CHECK-OBJ: Address: 0x0
> +@ CHECK-OBJ: Offset: 0x34
> +@ CHECK-OBJ: Size: 24
> +@ CHECK-OBJ: Link: 0
> +@ CHECK-OBJ: Info: 0
> +@ CHECK-OBJ: AddressAlignment: 1
> +@ CHECK-OBJ: EntrySize: 0
> +@ CHECK-OBJ: SectionData (
> +@ CHECK-OBJ: 0000: 41170000 00616561 62690001 0D000000
> |A....aeabi......|
> +@ CHECK-OBJ: 0010: 05324100 06010801 |.2A.....|
> +@ CHECK-OBJ: )
>
> Added: llvm/trunk/test/MC/ARM/directive-arch-armv3.s
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv3.s?rev=197052&view=auto
>
> ==============================================================================
> --- llvm/trunk/test/MC/ARM/directive-arch-armv3.s (added)
> +++ llvm/trunk/test/MC/ARM/directive-arch-armv3.s Wed Dec 11 11:16:25 2013
> @@ -0,0 +1,30 @@
> +@ Test the .arch directive for armv3
> +
> +@ This test case will check the default .ARM.attributes value for the
> +@ armv3 architecture.
> +
> +@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
> +@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
> +@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
> +@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
> +
> + .syntax unified
> + .arch armv3
> +
> +@ CHECK-ASM: .arch armv3
> +
> +@ CHECK-OBJ: Name: .ARM.attributes
> +@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
> +@ CHECK-OBJ: Flags [ (0x0)
> +@ CHECK-OBJ: ]
> +@ CHECK-OBJ: Address: 0x0
> +@ CHECK-OBJ: Offset: 0x34
> +@ CHECK-OBJ: Size: 23
> +@ CHECK-OBJ: Link: 0
> +@ CHECK-OBJ: Info: 0
> +@ CHECK-OBJ: AddressAlignment: 1
> +@ CHECK-OBJ: EntrySize: 0
> +@ CHECK-OBJ: SectionData (
> +@ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000
> |A....aeabi......|
> +@ CHECK-OBJ: 0010: 05330006 010801 |.3.....|
> +@ CHECK-OBJ: )
>
> Added: llvm/trunk/test/MC/ARM/directive-arch-armv3m.s
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv3m.s?rev=197052&view=auto
>
> ==============================================================================
> --- llvm/trunk/test/MC/ARM/directive-arch-armv3m.s (added)
> +++ llvm/trunk/test/MC/ARM/directive-arch-armv3m.s Wed Dec 11 11:16:25 2013
> @@ -0,0 +1,30 @@
> +@ Test the .arch directive for armv3m
> +
> +@ This test case will check the default .ARM.attributes value for the
> +@ armv3m architecture.
> +
> +@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
> +@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
> +@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
> +@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
> +
> + .syntax unified
> + .arch armv3m
> +
> +@ CHECK-ASM: .arch armv3m
> +
> +@ CHECK-OBJ: Name: .ARM.attributes
> +@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
> +@ CHECK-OBJ: Flags [ (0x0)
> +@ CHECK-OBJ: ]
> +@ CHECK-OBJ: Address: 0x0
> +@ CHECK-OBJ: Offset: 0x34
> +@ CHECK-OBJ: Size: 24
> +@ CHECK-OBJ: Link: 0
> +@ CHECK-OBJ: Info: 0
> +@ CHECK-OBJ: AddressAlignment: 1
> +@ CHECK-OBJ: EntrySize: 0
> +@ CHECK-OBJ: SectionData (
> +@ CHECK-OBJ: 0000: 41170000 00616561 62690001 0D000000
> |A....aeabi......|
> +@ CHECK-OBJ: 0010: 05334D00 06010801 |.3M.....|
> +@ CHECK-OBJ: )
>
> Added: llvm/trunk/test/MC/ARM/directive-arch-armv4.s
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv4.s?rev=197052&view=auto
>
> ==============================================================================
> --- llvm/trunk/test/MC/ARM/directive-arch-armv4.s (added)
> +++ llvm/trunk/test/MC/ARM/directive-arch-armv4.s Wed Dec 11 11:16:25 2013
> @@ -0,0 +1,30 @@
> +@ Test the .arch directive for armv4
> +
> +@ This test case will check the default .ARM.attributes value for the
> +@ armv4 architecture.
> +
> +@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
> +@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
> +@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
> +@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
> +
> + .syntax unified
> + .arch armv4
> +
> +@ CHECK-ASM: .arch armv4
> +
> +@ CHECK-OBJ: Name: .ARM.attributes
> +@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
> +@ CHECK-OBJ: Flags [ (0x0)
> +@ CHECK-OBJ: ]
> +@ CHECK-OBJ: Address: 0x0
> +@ CHECK-OBJ: Offset: 0x34
> +@ CHECK-OBJ: Size: 23
> +@ CHECK-OBJ: Link: 0
> +@ CHECK-OBJ: Info: 0
> +@ CHECK-OBJ: AddressAlignment: 1
> +@ CHECK-OBJ: EntrySize: 0
> +@ CHECK-OBJ: SectionData (
> +@ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000
> |A....aeabi......|
> +@ CHECK-OBJ: 0010: 05340006 010801 |.4.....|
> +@ CHECK-OBJ: )
>
> Added: llvm/trunk/test/MC/ARM/directive-arch-armv4t.s
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv4t.s?rev=197052&view=auto
>
> ==============================================================================
> --- llvm/trunk/test/MC/ARM/directive-arch-armv4t.s (added)
> +++ llvm/trunk/test/MC/ARM/directive-arch-armv4t.s Wed Dec 11 11:16:25 2013
> @@ -0,0 +1,30 @@
> +@ Test the .arch directive for armv4t
> +
> +@ This test case will check the default .ARM.attributes value for the
> +@ armv4t architecture.
> +
> +@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
> +@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
> +@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
> +@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
> +
> + .syntax unified
> + .arch armv4t
> +
> +@ CHECK-ASM: .arch armv4t
> +
> +@ CHECK-OBJ: Name: .ARM.attributes
> +@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
> +@ CHECK-OBJ: Flags [ (0x0)
> +@ CHECK-OBJ: ]
> +@ CHECK-OBJ: Address: 0x0
> +@ CHECK-OBJ: Offset: 0x34
> +@ CHECK-OBJ: Size: 26
> +@ CHECK-OBJ: Link: 0
> +@ CHECK-OBJ: Info: 0
> +@ CHECK-OBJ: AddressAlignment: 1
> +@ CHECK-OBJ: EntrySize: 0
> +@ CHECK-OBJ: SectionData (
> +@ CHECK-OBJ: 0000: 41190000 00616561 62690001 0F000000
> |A....aeabi......|
> +@ CHECK-OBJ: 0010: 05345400 06020801 0901 |.4T.......|
> +@ CHECK-OBJ: )
>
> Added: llvm/trunk/test/MC/ARM/directive-arch-armv5.s
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv5.s?rev=197052&view=auto
>
> ==============================================================================
> --- llvm/trunk/test/MC/ARM/directive-arch-armv5.s (added)
> +++ llvm/trunk/test/MC/ARM/directive-arch-armv5.s Wed Dec 11 11:16:25 2013
> @@ -0,0 +1,30 @@
> +@ Test the .arch directive for armv5
> +
> +@ This test case will check the default .ARM.attributes value for the
> +@ armv5 architecture.
> +
> +@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
> +@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
> +@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
> +@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
> +
> + .syntax unified
> + .arch armv5
> +
> +@ CHECK-ASM: .arch armv5
> +
> +@ CHECK-OBJ: Name: .ARM.attributes
> +@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
> +@ CHECK-OBJ: Flags [ (0x0)
> +@ CHECK-OBJ: ]
> +@ CHECK-OBJ: Address: 0x0
> +@ CHECK-OBJ: Offset: 0x34
> +@ CHECK-OBJ: Size: 23
> +@ CHECK-OBJ: Link: 0
> +@ CHECK-OBJ: Info: 0
> +@ CHECK-OBJ: AddressAlignment: 1
> +@ CHECK-OBJ: EntrySize: 0
> +@ CHECK-OBJ: SectionData (
> +@ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000
> |A....aeabi......|
> +@ CHECK-OBJ: 0010: 05350006 030801 |.5.....|
> +@ CHECK-OBJ: )
>
> Added: llvm/trunk/test/MC/ARM/directive-arch-armv5t.s
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv5t.s?rev=197052&view=auto
>
> ==============================================================================
> --- llvm/trunk/test/MC/ARM/directive-arch-armv5t.s (added)
> +++ llvm/trunk/test/MC/ARM/directive-arch-armv5t.s Wed Dec 11 11:16:25 2013
> @@ -0,0 +1,30 @@
> +@ Test the .arch directive for armv5t
> +
> +@ This test case will check the default .ARM.attributes value for the
> +@ armv5t architecture.
> +
> +@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
> +@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
> +@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
> +@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
> +
> + .syntax unified
> + .arch armv5t
> +
> +@ CHECK-ASM: .arch armv5t
> +
> +@ CHECK-OBJ: Name: .ARM.attributes
> +@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
> +@ CHECK-OBJ: Flags [ (0x0)
> +@ CHECK-OBJ: ]
> +@ CHECK-OBJ: Address: 0x0
> +@ CHECK-OBJ: Offset: 0x34
> +@ CHECK-OBJ: Size: 26
> +@ CHECK-OBJ: Link: 0
> +@ CHECK-OBJ: Info: 0
> +@ CHECK-OBJ: AddressAlignment: 1
> +@ CHECK-OBJ: EntrySize: 0
> +@ CHECK-OBJ: SectionData (
> +@ CHECK-OBJ: 0000: 41190000 00616561 62690001 0F000000
> |A....aeabi......|
> +@ CHECK-OBJ: 0010: 05355400 06030801 0901 |.5T.......|
> +@ CHECK-OBJ: )
>
> Added: llvm/trunk/test/MC/ARM/directive-arch-armv5te.s
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv5te.s?rev=197052&view=auto
>
> ==============================================================================
> --- llvm/trunk/test/MC/ARM/directive-arch-armv5te.s (added)
> +++ llvm/trunk/test/MC/ARM/directive-arch-armv5te.s Wed Dec 11 11:16:25
> 2013
> @@ -0,0 +1,30 @@
> +@ Test the .arch directive for armv5te
> +
> +@ This test case will check the default .ARM.attributes value for the
> +@ armv5te architecture.
> +
> +@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
> +@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
> +@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
> +@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
> +
> + .syntax unified
> + .arch armv5te
> +
> +@ CHECK-ASM: .arch armv5te
> +
> +@ CHECK-OBJ: Name: .ARM.attributes
> +@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
> +@ CHECK-OBJ: Flags [ (0x0)
> +@ CHECK-OBJ: ]
> +@ CHECK-OBJ: Address: 0x0
> +@ CHECK-OBJ: Offset: 0x34
> +@ CHECK-OBJ: Size: 27
> +@ CHECK-OBJ: Link: 0
> +@ CHECK-OBJ: Info: 0
> +@ CHECK-OBJ: AddressAlignment: 1
> +@ CHECK-OBJ: EntrySize: 0
> +@ CHECK-OBJ: SectionData (
> +@ CHECK-OBJ: 0000: 411A0000 00616561 62690001 10000000
> |A....aeabi......|
> +@ CHECK-OBJ: 0010: 05355445 00060408 010901 |.5TE.......|
> +@ CHECK-OBJ: )
>
> Added: llvm/trunk/test/MC/ARM/directive-arch-armv6-m.s
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv6-m.s?rev=197052&view=auto
>
> ==============================================================================
> --- llvm/trunk/test/MC/ARM/directive-arch-armv6-m.s (added)
> +++ llvm/trunk/test/MC/ARM/directive-arch-armv6-m.s Wed Dec 11 11:16:25
> 2013
> @@ -0,0 +1,30 @@
> +@ Test the .arch directive for armv6-m
> +
> +@ This test case will check the default .ARM.attributes value for the
> +@ armv6-m architecture.
> +
> +@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
> +@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
> +@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
> +@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
> +
> + .syntax unified
> + .arch armv6-m
> +
> +@ CHECK-ASM: .arch armv6-m
> +
> +@ CHECK-OBJ: Name: .ARM.attributes
> +@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
> +@ CHECK-OBJ: Flags [ (0x0)
> +@ CHECK-OBJ: ]
> +@ CHECK-OBJ: Address: 0x0
> +@ CHECK-OBJ: Offset: 0x34
> +@ CHECK-OBJ: Size: 27
> +@ CHECK-OBJ: Link: 0
> +@ CHECK-OBJ: Info: 0
> +@ CHECK-OBJ: AddressAlignment: 1
> +@ CHECK-OBJ: EntrySize: 0
> +@ CHECK-OBJ: SectionData (
> +@ CHECK-OBJ: 0000: 411A0000 00616561 62690001 10000000
> |A....aeabi......|
> +@ CHECK-OBJ: 0010: 05362D4D 00060B07 4D0901 |.6-M....M..|
> +@ CHECK-OBJ: )
>
> Added: llvm/trunk/test/MC/ARM/directive-arch-armv6.s
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv6.s?rev=197052&view=auto
>
> ==============================================================================
> --- llvm/trunk/test/MC/ARM/directive-arch-armv6.s (added)
> +++ llvm/trunk/test/MC/ARM/directive-arch-armv6.s Wed Dec 11 11:16:25 2013
> @@ -0,0 +1,30 @@
> +@ Test the .arch directive for armv6
> +
> +@ This test case will check the default .ARM.attributes value for the
> +@ armv6 architecture.
> +
> +@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
> +@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
> +@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
> +@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
> +
> + .syntax unified
> + .arch armv6
> +
> +@ CHECK-ASM: .arch armv6
> +
> +@ CHECK-OBJ: Name: .ARM.attributes
> +@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
> +@ CHECK-OBJ: Flags [ (0x0)
> +@ CHECK-OBJ: ]
> +@ CHECK-OBJ: Address: 0x0
> +@ CHECK-OBJ: Offset: 0x34
> +@ CHECK-OBJ: Size: 25
> +@ CHECK-OBJ: Link: 0
> +@ CHECK-OBJ: Info: 0
> +@ CHECK-OBJ: AddressAlignment: 1
> +@ CHECK-OBJ: EntrySize: 0
> +@ CHECK-OBJ: SectionData (
> +@ CHECK-OBJ: 0000: 41180000 00616561 62690001 0E000000
> |A....aeabi......|
> +@ CHECK-OBJ: 0010: 05360006 06080109 01 |.6.......|
> +@ CHECK-OBJ: )
>
> Added: llvm/trunk/test/MC/ARM/directive-arch-armv6j.s
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv6j.s?rev=197052&view=auto
>
> ==============================================================================
> --- llvm/trunk/test/MC/ARM/directive-arch-armv6j.s (added)
> +++ llvm/trunk/test/MC/ARM/directive-arch-armv6j.s Wed Dec 11 11:16:25 2013
> @@ -0,0 +1,30 @@
> +@ Test the .arch directive for armv6j
> +
> +@ This test case will check the default .ARM.attributes value for the
> +@ armv6j architecture.
> +
> +@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
> +@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
> +@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
> +@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
> +
> + .syntax unified
> + .arch armv6j
> +
> +@ CHECK-ASM: .arch armv6j
> +
> +@ CHECK-OBJ: Name: .ARM.attributes
> +@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
> +@ CHECK-OBJ: Flags [ (0x0)
> +@ CHECK-OBJ: ]
> +@ CHECK-OBJ: Address: 0x0
> +@ CHECK-OBJ: Offset: 0x34
> +@ CHECK-OBJ: Size: 26
> +@ CHECK-OBJ: Link: 0
> +@ CHECK-OBJ: Info: 0
> +@ CHECK-OBJ: AddressAlignment: 1
> +@ CHECK-OBJ: EntrySize: 0
> +@ CHECK-OBJ: SectionData (
> +@ CHECK-OBJ: 0000: 41190000 00616561 62690001 0F000000
> |A....aeabi......|
> +@ CHECK-OBJ: 0010: 05364A00 06060801 0901 |.6J.......|
> +@ CHECK-OBJ: )
>
> Added: llvm/trunk/test/MC/ARM/directive-arch-armv6t2.s
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv6t2.s?rev=197052&view=auto
>
> ==============================================================================
> --- llvm/trunk/test/MC/ARM/directive-arch-armv6t2.s (added)
> +++ llvm/trunk/test/MC/ARM/directive-arch-armv6t2.s Wed Dec 11 11:16:25
> 2013
> @@ -0,0 +1,30 @@
> +@ Test the .arch directive for armv6t2
> +
> +@ This test case will check the default .ARM.attributes value for the
> +@ armv6t2 architecture.
> +
> +@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
> +@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
> +@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
> +@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
> +
> + .syntax unified
> + .arch armv6t2
> +
> +@ CHECK-ASM: .arch armv6t2
> +
> +@ CHECK-OBJ: Name: .ARM.attributes
> +@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
> +@ CHECK-OBJ: Flags [ (0x0)
> +@ CHECK-OBJ: ]
> +@ CHECK-OBJ: Address: 0x0
> +@ CHECK-OBJ: Offset: 0x34
> +@ CHECK-OBJ: Size: 27
> +@ CHECK-OBJ: Link: 0
> +@ CHECK-OBJ: Info: 0
> +@ CHECK-OBJ: AddressAlignment: 1
> +@ CHECK-OBJ: EntrySize: 0
> +@ CHECK-OBJ: SectionData (
> +@ CHECK-OBJ: 0000: 411A0000 00616561 62690001 10000000
> |A....aeabi......|
> +@ CHECK-OBJ: 0010: 05365432 00060808 010902 |.6T2.......|
> +@ CHECK-OBJ: )
>
> Added: llvm/trunk/test/MC/ARM/directive-arch-armv6z.s
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv6z.s?rev=197052&view=auto
>
> ==============================================================================
> --- llvm/trunk/test/MC/ARM/directive-arch-armv6z.s (added)
> +++ llvm/trunk/test/MC/ARM/directive-arch-armv6z.s Wed Dec 11 11:16:25 2013
> @@ -0,0 +1,30 @@
> +@ Test the .arch directive for armv6z
> +
> +@ This test case will check the default .ARM.attributes value for the
> +@ armv6z architecture.
> +
> +@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
> +@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
> +@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
> +@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
> +
> + .syntax unified
> + .arch armv6z
> +
> +@ CHECK-ASM: .arch armv6z
> +
> +@ CHECK-OBJ: Name: .ARM.attributes
> +@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
> +@ CHECK-OBJ: Flags [ (0x0)
> +@ CHECK-OBJ: ]
> +@ CHECK-OBJ: Address: 0x0
> +@ CHECK-OBJ: Offset: 0x34
> +@ CHECK-OBJ: Size: 28
> +@ CHECK-OBJ: Link: 0
> +@ CHECK-OBJ: Info: 0
> +@ CHECK-OBJ: AddressAlignment: 1
> +@ CHECK-OBJ: EntrySize: 0
> +@ CHECK-OBJ: SectionData (
> +@ CHECK-OBJ: 0000: 411B0000 00616561 62690001 11000000
> |A....aeabi......|
> +@ CHECK-OBJ: 0010: 05365A00 06070801 09014401
> |.6Z.......D.|
> +@ CHECK-OBJ: )
>
> Added: llvm/trunk/test/MC/ARM/directive-arch-armv6zk.s
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv6zk.s?rev=197052&view=auto
>
> ==============================================================================
> --- llvm/trunk/test/MC/ARM/directive-arch-armv6zk.s (added)
> +++ llvm/trunk/test/MC/ARM/directive-arch-armv6zk.s Wed Dec 11 11:16:25
> 2013
> @@ -0,0 +1,30 @@
> +@ Test the .arch directive for armv6zk
> +
> +@ This test case will check the default .ARM.attributes value for the
> +@ armv6zk architecture.
> +
> +@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
> +@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
> +@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
> +@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
> +
> + .syntax unified
> + .arch armv6zk
> +
> +@ CHECK-ASM: .arch armv6zk
> +
> +@ CHECK-OBJ: Name: .ARM.attributes
> +@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
> +@ CHECK-OBJ: Flags [ (0x0)
> +@ CHECK-OBJ: ]
> +@ CHECK-OBJ: Address: 0x0
> +@ CHECK-OBJ: Offset: 0x34
> +@ CHECK-OBJ: Size: 29
> +@ CHECK-OBJ: Link: 0
> +@ CHECK-OBJ: Info: 0
> +@ CHECK-OBJ: AddressAlignment: 1
> +@ CHECK-OBJ: EntrySize: 0
> +@ CHECK-OBJ: SectionData (
> +@ CHECK-OBJ: 0000: 411C0000 00616561 62690001 12000000
> |A....aeabi......|
> +@ CHECK-OBJ: 0010: 05365A4B 00060708 01090144 01
> |.6ZK.......D.|
> +@ CHECK-OBJ: )
>
> Added: llvm/trunk/test/MC/ARM/directive-arch-armv7-a.s
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv7-a.s?rev=197052&view=auto
>
> ==============================================================================
> --- llvm/trunk/test/MC/ARM/directive-arch-armv7-a.s (added)
> +++ llvm/trunk/test/MC/ARM/directive-arch-armv7-a.s Wed Dec 11 11:16:25
> 2013
> @@ -0,0 +1,30 @@
> +@ Test the .arch directive for armv7-a
> +
> +@ This test case will check the default .ARM.attributes value for the
> +@ armv7-a architecture.
> +
> +@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
> +@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
> +@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
> +@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
> +
> + .syntax unified
> + .arch armv7-a
> +
> +@ CHECK-ASM: .arch armv7-a
> +
> +@ CHECK-OBJ: Name: .ARM.attributes
> +@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
> +@ CHECK-OBJ: Flags [ (0x0)
> +@ CHECK-OBJ: ]
> +@ CHECK-OBJ: Address: 0x0
> +@ CHECK-OBJ: Offset: 0x34
> +@ CHECK-OBJ: Size: 29
> +@ CHECK-OBJ: Link: 0
> +@ CHECK-OBJ: Info: 0
> +@ CHECK-OBJ: AddressAlignment: 1
> +@ CHECK-OBJ: EntrySize: 0
> +@ CHECK-OBJ: SectionData (
> +@ CHECK-OBJ: 0000: 411C0000 00616561 62690001 12000000
> |A....aeabi......|
> +@ CHECK-OBJ: 0010: 05372D41 00060A07 41080109 02
> |.7-A....A....|
> +@ CHECK-OBJ: )
>
> Added: llvm/trunk/test/MC/ARM/directive-arch-armv7-m.s
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv7-m.s?rev=197052&view=auto
>
> ==============================================================================
> --- llvm/trunk/test/MC/ARM/directive-arch-armv7-m.s (added)
> +++ llvm/trunk/test/MC/ARM/directive-arch-armv7-m.s Wed Dec 11 11:16:25
> 2013
> @@ -0,0 +1,30 @@
> +@ Test the .arch directive for armv7-m
> +
> +@ This test case will check the default .ARM.attributes value for the
> +@ armv7-m architecture.
> +
> +@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
> +@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
> +@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
> +@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
> +
> + .syntax unified
> + .arch armv7-m
> +
> +@ CHECK-ASM: .arch armv7-m
> +
> +@ CHECK-OBJ: Name: .ARM.attributes
> +@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
> +@ CHECK-OBJ: Flags [ (0x0)
> +@ CHECK-OBJ: ]
> +@ CHECK-OBJ: Address: 0x0
> +@ CHECK-OBJ: Offset: 0x34
> +@ CHECK-OBJ: Size: 27
> +@ CHECK-OBJ: Link: 0
> +@ CHECK-OBJ: Info: 0
> +@ CHECK-OBJ: AddressAlignment: 1
> +@ CHECK-OBJ: EntrySize: 0
> +@ CHECK-OBJ: SectionData (
> +@ CHECK-OBJ: 0000: 411A0000 00616561 62690001 10000000
> |A....aeabi......|
> +@ CHECK-OBJ: 0010: 05372D4D 00060A07 4D0902 |.7-M....M..|
> +@ CHECK-OBJ: )
>
> Added: llvm/trunk/test/MC/ARM/directive-arch-armv7-r.s
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv7-r.s?rev=197052&view=auto
>
> ==============================================================================
> --- llvm/trunk/test/MC/ARM/directive-arch-armv7-r.s (added)
> +++ llvm/trunk/test/MC/ARM/directive-arch-armv7-r.s Wed Dec 11 11:16:25
> 2013
> @@ -0,0 +1,30 @@
> +@ Test the .arch directive for armv7-r
> +
> +@ This test case will check the default .ARM.attributes value for the
> +@ armv7-r architecture.
> +
> +@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
> +@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
> +@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
> +@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
> +
> + .syntax unified
> + .arch armv7-r
> +
> +@ CHECK-ASM: .arch armv7-r
> +
> +@ CHECK-OBJ: Name: .ARM.attributes
> +@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
> +@ CHECK-OBJ: Flags [ (0x0)
> +@ CHECK-OBJ: ]
> +@ CHECK-OBJ: Address: 0x0
> +@ CHECK-OBJ: Offset: 0x34
> +@ CHECK-OBJ: Size: 29
> +@ CHECK-OBJ: Link: 0
> +@ CHECK-OBJ: Info: 0
> +@ CHECK-OBJ: AddressAlignment: 1
> +@ CHECK-OBJ: EntrySize: 0
> +@ CHECK-OBJ: SectionData (
> +@ CHECK-OBJ: 0000: 411C0000 00616561 62690001 12000000
> |A....aeabi......|
> +@ CHECK-OBJ: 0010: 05372D52 00060A07 52080109 02
> |.7-R....R....|
> +@ CHECK-OBJ: )
>
> Added: llvm/trunk/test/MC/ARM/directive-arch-armv7.s
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv7.s?rev=197052&view=auto
>
> ==============================================================================
> --- llvm/trunk/test/MC/ARM/directive-arch-armv7.s (added)
> +++ llvm/trunk/test/MC/ARM/directive-arch-armv7.s Wed Dec 11 11:16:25 2013
> @@ -0,0 +1,30 @@
> +@ Test the .arch directive for armv7
> +
> +@ This test case will check the default .ARM.attributes value for the
> +@ armv7 architecture.
> +
> +@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
> +@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
> +@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
> +@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
> +
> + .syntax unified
> + .arch armv7
> +
> +@ CHECK-ASM: .arch armv7
> +
> +@ CHECK-OBJ: Name: .ARM.attributes
> +@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
> +@ CHECK-OBJ: Flags [ (0x0)
> +@ CHECK-OBJ: ]
> +@ CHECK-OBJ: Address: 0x0
> +@ CHECK-OBJ: Offset: 0x34
> +@ CHECK-OBJ: Size: 23
> +@ CHECK-OBJ: Link: 0
> +@ CHECK-OBJ: Info: 0
> +@ CHECK-OBJ: AddressAlignment: 1
> +@ CHECK-OBJ: EntrySize: 0
> +@ CHECK-OBJ: SectionData (
> +@ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000
> |A....aeabi......|
> +@ CHECK-OBJ: 0010: 05370006 0A0902 |.7.....|
> +@ CHECK-OBJ: )
>
> Added: llvm/trunk/test/MC/ARM/directive-arch-armv8-a.s
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv8-a.s?rev=197052&view=auto
>
> ==============================================================================
> --- llvm/trunk/test/MC/ARM/directive-arch-armv8-a.s (added)
> +++ llvm/trunk/test/MC/ARM/directive-arch-armv8-a.s Wed Dec 11 11:16:25
> 2013
> @@ -0,0 +1,31 @@
> +@ Test the .arch directive for armv8-a
> +
> +@ This test case will check the default .ARM.attributes value for the
> +@ armv8-a architecture.
> +
> +@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
> +@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
> +@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
> +@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
> +
> + .syntax unified
> + .arch armv8-a
> +
> +@ CHECK-ASM: .arch armv8-a
> +
> +@ CHECK-OBJ: Name: .ARM.attributes
> +@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
> +@ CHECK-OBJ: Flags [ (0x0)
> +@ CHECK-OBJ: ]
> +@ CHECK-OBJ: Address: 0x0
> +@ CHECK-OBJ: Offset: 0x34
> +@ CHECK-OBJ: Size: 33
> +@ CHECK-OBJ: Link: 0
> +@ CHECK-OBJ: Info: 0
> +@ CHECK-OBJ: AddressAlignment: 1
> +@ CHECK-OBJ: EntrySize: 0
> +@ CHECK-OBJ: SectionData (
> +@ CHECK-OBJ: 0000: 41200000 00616561 62690001 16000000 |A
> ...aeabi......|
> +@ CHECK-OBJ: 0010: 05382D41 00060E07 41080109 022A0144
> |.8-A....A....*.D|
> +@ CHECK-OBJ: 0020: 03 |.|
> +@ CHECK-OBJ: )
>
> Added: llvm/trunk/test/MC/ARM/directive-arch-iwmmxt.s
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-iwmmxt.s?rev=197052&view=auto
>
> ==============================================================================
> --- llvm/trunk/test/MC/ARM/directive-arch-iwmmxt.s (added)
> +++ llvm/trunk/test/MC/ARM/directive-arch-iwmmxt.s Wed Dec 11 11:16:25 2013
> @@ -0,0 +1,30 @@
> +@ Test the .arch directive for iwmmxt
> +
> +@ This test case will check the default .ARM.attributes value for the
> +@ iwmmxt architecture.
> +
> +@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
> +@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
> +@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
> +@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
> +
> + .syntax unified
> + .arch iwmmxt
> +
> +@ CHECK-ASM: .arch iwmmxt
> +
> +@ CHECK-OBJ: Name: .ARM.attributes
> +@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
> +@ CHECK-OBJ: Flags [ (0x0)
> +@ CHECK-OBJ: ]
> +@ CHECK-OBJ: Address: 0x0
> +@ CHECK-OBJ: Offset: 0x34
> +@ CHECK-OBJ: Size: 32
> +@ CHECK-OBJ: Link: 0
> +@ CHECK-OBJ: Info: 0
> +@ CHECK-OBJ: AddressAlignment: 1
> +@ CHECK-OBJ: EntrySize: 0
> +@ CHECK-OBJ: SectionData (
> +@ CHECK-OBJ: 0000: 411F0000 00616561 62690001 15000000
> |A....aeabi......|
> +@ CHECK-OBJ: 0010: 0549574D 4D585400 06040801 09010B01
> |.IWMMXT.........|
> +@ CHECK-OBJ: )
>
> Added: llvm/trunk/test/MC/ARM/directive-arch-iwmmxt2.s
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-iwmmxt2.s?rev=197052&view=auto
>
> ==============================================================================
> --- llvm/trunk/test/MC/ARM/directive-arch-iwmmxt2.s (added)
> +++ llvm/trunk/test/MC/ARM/directive-arch-iwmmxt2.s Wed Dec 11 11:16:25
> 2013
> @@ -0,0 +1,31 @@
> +@ Test the .arch directive for iwmmxt2
> +
> +@ This test case will check the default .ARM.attributes value for the
> +@ iwmmxt2 architecture.
> +
> +@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
> +@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
> +@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
> +@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
> +
> + .syntax unified
> + .arch iwmmxt2
> +
> +@ CHECK-ASM: .arch iwmmxt2
> +
> +@ CHECK-OBJ: Name: .ARM.attributes
> +@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
> +@ CHECK-OBJ: Flags [ (0x0)
> +@ CHECK-OBJ: ]
> +@ CHECK-OBJ: Address: 0x0
> +@ CHECK-OBJ: Offset: 0x34
> +@ CHECK-OBJ: Size: 33
> +@ CHECK-OBJ: Link: 0
> +@ CHECK-OBJ: Info: 0
> +@ CHECK-OBJ: AddressAlignment: 1
> +@ CHECK-OBJ: EntrySize: 0
> +@ CHECK-OBJ: SectionData (
> +@ CHECK-OBJ: 0000: 41200000 00616561 62690001 16000000 |A
> ...aeabi......|
> +@ CHECK-OBJ: 0010: 0549574D 4D585432 00060408 0109010B
> |.IWMMXT2........|
> +@ CHECK-OBJ: 0020: 02 |.|
> +@ CHECK-OBJ: )
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20131211/757ea8c7/attachment.html>
More information about the llvm-commits
mailing list