<div dir="ltr">This is breaking an internal bot:<div><pre style="font-family:'Courier New',courier,monotype,monospace;color:rgb(0,0,0);font-size:medium"><span class="">Failing Tests (22):
LLVM :: MC/ARM/directive-arch-armv2.s
LLVM :: MC/ARM/directive-arch-armv2a.s
LLVM :: MC/ARM/directive-arch-armv3.s
LLVM :: MC/ARM/directive-arch-armv3m.s
LLVM :: MC/ARM/directive-arch-armv4.s
LLVM :: MC/ARM/directive-arch-armv4t.s
LLVM :: MC/ARM/directive-arch-armv5.s
LLVM :: MC/ARM/directive-arch-armv5t.s
LLVM :: MC/ARM/directive-arch-armv5te.s
LLVM :: MC/ARM/directive-arch-armv6-m.s
LLVM :: MC/ARM/directive-arch-armv6.s
LLVM :: MC/ARM/directive-arch-armv6j.s
LLVM :: MC/ARM/directive-arch-armv6t2.s
LLVM :: MC/ARM/directive-arch-armv6z.s
LLVM :: MC/ARM/directive-arch-armv6zk.s
LLVM :: MC/ARM/directive-arch-armv7-a.s
LLVM :: MC/ARM/directive-arch-armv7-m.s
LLVM :: MC/ARM/directive-arch-armv7-r.s
LLVM :: MC/ARM/directive-arch-armv7.s
LLVM :: MC/ARM/directive-arch-armv8-a.s
LLVM :: MC/ARM/directive-arch-iwmmxt.s
LLVM :: MC/ARM/directive-arch-iwmmxt2.s</span></pre><div><pre style="font-family:'Courier New',courier,monotype,monospace;color:rgb(0,0,0);font-size:medium"><span class="">--
Stack dump:
</span></pre><pre style="font-family:'Courier New',courier,monotype,monospace;color:rgb(0,0,0);font-size:medium"><span class="">0. Program arguments: llvm-mc -arch=arm -filetype=obj
<stdin>: The file was not recognized as a valid object file
FileCheck error: '-' is empty.</span></pre><pre style="font-family:'Courier New',courier,monotype,monospace;color:rgb(0,0,0);font-size:medium">Any idea what is wrong?</pre><pre style="font-family:'Courier New',courier,monotype,monospace;color:rgb(0,0,0);font-size:medium">
Thanks,</pre><pre style="font-family:'Courier New',courier,monotype,monospace;color:rgb(0,0,0);font-size:medium">Manman</pre></div></div></div><div class="gmail_extra"><br><br><div class="gmail_quote">On Wed, Dec 11, 2013 at 9:16 AM, Logan Chien <span dir="ltr"><<a href="mailto:tzuhsiang.chien@gmail.com" target="_blank">tzuhsiang.chien@gmail.com</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: logan<br>
Date: Wed Dec 11 11:16:25 2013<br>
New Revision: 197052<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=197052&view=rev" target="_blank">http://llvm.org/viewvc/llvm-project?rev=197052&view=rev</a><br>
Log:<br>
[arm] Implement ARM .arch directive.<br>
<br>
Added:<br>
llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMArchName.def<br>
llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMArchName.h<br>
llvm/trunk/test/MC/ARM/directive-arch-armv2.s<br>
llvm/trunk/test/MC/ARM/directive-arch-armv2a.s<br>
llvm/trunk/test/MC/ARM/directive-arch-armv3.s<br>
llvm/trunk/test/MC/ARM/directive-arch-armv3m.s<br>
llvm/trunk/test/MC/ARM/directive-arch-armv4.s<br>
llvm/trunk/test/MC/ARM/directive-arch-armv4t.s<br>
llvm/trunk/test/MC/ARM/directive-arch-armv5.s<br>
llvm/trunk/test/MC/ARM/directive-arch-armv5t.s<br>
llvm/trunk/test/MC/ARM/directive-arch-armv5te.s<br>
llvm/trunk/test/MC/ARM/directive-arch-armv6-m.s<br>
llvm/trunk/test/MC/ARM/directive-arch-armv6.s<br>
llvm/trunk/test/MC/ARM/directive-arch-armv6j.s<br>
llvm/trunk/test/MC/ARM/directive-arch-armv6t2.s<br>
llvm/trunk/test/MC/ARM/directive-arch-armv6z.s<br>
llvm/trunk/test/MC/ARM/directive-arch-armv6zk.s<br>
llvm/trunk/test/MC/ARM/directive-arch-armv7-a.s<br>
llvm/trunk/test/MC/ARM/directive-arch-armv7-m.s<br>
llvm/trunk/test/MC/ARM/directive-arch-armv7-r.s<br>
llvm/trunk/test/MC/ARM/directive-arch-armv7.s<br>
llvm/trunk/test/MC/ARM/directive-arch-armv8-a.s<br>
llvm/trunk/test/MC/ARM/directive-arch-iwmmxt.s<br>
llvm/trunk/test/MC/ARM/directive-arch-iwmmxt2.s<br>
Modified:<br>
llvm/trunk/include/llvm/MC/MCStreamer.h<br>
llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp<br>
llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp<br>
<br>
Modified: llvm/trunk/include/llvm/MC/MCStreamer.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCStreamer.h?rev=197052&r1=197051&r2=197052&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCStreamer.h?rev=197052&r1=197051&r2=197052&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/include/llvm/MC/MCStreamer.h (original)<br>
+++ llvm/trunk/include/llvm/MC/MCStreamer.h Wed Dec 11 11:16:25 2013<br>
@@ -93,6 +93,7 @@ public:<br>
virtual void emitAttribute(unsigned Attribute, unsigned Value) = 0;<br>
virtual void emitTextAttribute(unsigned Attribute, StringRef String) = 0;<br>
virtual void emitFPU(unsigned FPU) = 0;<br>
+ virtual void emitArch(unsigned Arch) = 0;<br>
virtual void finishAttributeSection() = 0;<br>
};<br>
<br>
<br>
Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=197052&r1=197051&r2=197052&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=197052&r1=197051&r2=197052&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp (original)<br>
+++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Wed Dec 11 11:16:25 2013<br>
@@ -12,6 +12,7 @@<br>
#include "ARMFeatures.h"<br>
#include "llvm/MC/MCTargetAsmParser.h"<br>
#include "MCTargetDesc/ARMAddressingModes.h"<br>
+#include "MCTargetDesc/ARMArchName.h"<br>
#include "MCTargetDesc/ARMBaseInfo.h"<br>
#include "MCTargetDesc/ARMMCExpr.h"<br>
#include "llvm/ADT/BitVector.h"<br>
@@ -8006,7 +8007,19 @@ bool ARMAsmParser::parseDirectiveUnreq(S<br>
/// parseDirectiveArch<br>
/// ::= .arch token<br>
bool ARMAsmParser::parseDirectiveArch(SMLoc L) {<br>
- return true;<br>
+ StringRef Arch = getParser().parseStringToEndOfStatement().trim();<br>
+<br>
+ unsigned ID = StringSwitch<unsigned>(Arch)<br>
+#define ARM_ARCH_NAME(NAME, ID, DEFAULT_CPU_NAME, DEFAULT_CPU_ARCH) \<br>
+ .Case(NAME, ARM::ID)<br>
+#include "MCTargetDesc/ARMArchName.def"<br>
+ .Default(ARM::INVALID_ARCH);<br>
+<br>
+ if (ID == ARM::INVALID_ARCH)<br>
+ return Error(L, "Unknown arch name");<br>
+<br>
+ getTargetStreamer().emitArch(ID);<br>
+ return false;<br>
}<br>
<br>
/// parseDirectiveEabiAttr<br>
<br>
Added: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMArchName.def<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMArchName.def?rev=197052&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMArchName.def?rev=197052&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMArchName.def (added)<br>
+++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMArchName.def Wed Dec 11 11:16:25 2013<br>
@@ -0,0 +1,45 @@<br>
+//===-- ARMArchName.def - List of the ARM arch names ------------*- C++ -*-===//<br>
+//<br>
+// The LLVM Compiler Infrastructure<br>
+//<br>
+// This file is distributed under the University of Illinois Open Source<br>
+// License. See LICENSE.TXT for details.<br>
+//<br>
+//===----------------------------------------------------------------------===//<br>
+//<br>
+// This file contains the list of the supported ARM architecture names,<br>
+// i.e. the supported value for -march= option.<br>
+//<br>
+//===----------------------------------------------------------------------===//<br>
+<br>
+// NOTE: NO INCLUDE GUARD DESIRED!<br>
+<br>
+#ifndef ARM_ARCH_NAME<br>
+#error "You must define ARM_ARCH_NAME before including ARMArchName.def"<br>
+#endif<br>
+<br>
+// ARM_ARCH_NAME(NAME, ID, DEFAULT_CPU_NAME, DEFAULT_CPU_ARCH)<br>
+ARM_ARCH_NAME("armv2", ARMV2, "2", v4)<br>
+ARM_ARCH_NAME("armv2a", ARMV2A, "2A", v4)<br>
+ARM_ARCH_NAME("armv3", ARMV3, "3", v4)<br>
+ARM_ARCH_NAME("armv3m", ARMV3M, "3M", v4)<br>
+ARM_ARCH_NAME("armv4", ARMV4, "4", v4)<br>
+ARM_ARCH_NAME("armv4t", ARMV4T, "4T", v4T)<br>
+ARM_ARCH_NAME("armv5", ARMV5, "5", v5T)<br>
+ARM_ARCH_NAME("armv5t", ARMV5T, "5T", v5T)<br>
+ARM_ARCH_NAME("armv5te", ARMV5TE, "5TE", v5TE)<br>
+ARM_ARCH_NAME("armv6", ARMV6, "6", v6)<br>
+ARM_ARCH_NAME("armv6j", ARMV6J, "6J", v6)<br>
+ARM_ARCH_NAME("armv6t2", ARMV6T2, "6T2", v6T2)<br>
+ARM_ARCH_NAME("armv6z", ARMV6Z, "6Z", v6KZ)<br>
+ARM_ARCH_NAME("armv6zk", ARMV6ZK, "6ZK", v6KZ)<br>
+ARM_ARCH_NAME("armv6-m", ARMV6M, "6-M", v6_M)<br>
+ARM_ARCH_NAME("armv7", ARMV7, "7", v7)<br>
+ARM_ARCH_NAME("armv7-a", ARMV7A, "7-A", v7)<br>
+ARM_ARCH_NAME("armv7-r", ARMV7R, "7-R", v7)<br>
+ARM_ARCH_NAME("armv7-m", ARMV7M, "7-M", v7)<br>
+ARM_ARCH_NAME("armv8-a", ARMV8A, "8-A", v8)<br>
+ARM_ARCH_NAME("iwmmxt", IWMMXT, "iwmmxt", v5TE)<br>
+ARM_ARCH_NAME("iwmmxt2", IWMMXT2, "iwmmxt2", v5TE)<br>
+<br>
+#undef ARM_ARCH_NAME<br>
<br>
Added: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMArchName.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMArchName.h?rev=197052&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMArchName.h?rev=197052&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMArchName.h (added)<br>
+++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMArchName.h Wed Dec 11 11:16:25 2013<br>
@@ -0,0 +1,26 @@<br>
+//===-- ARMArchName.h - List of the ARM arch names --------------*- C++ -*-===//<br>
+//<br>
+// The LLVM Compiler Infrastructure<br>
+//<br>
+// This file is distributed under the University of Illinois Open Source<br>
+// License. See LICENSE.TXT for details.<br>
+//<br>
+//===----------------------------------------------------------------------===//<br>
+<br>
+#ifndef ARMARCHNAME_H<br>
+#define ARMARCHNAME_H<br>
+<br>
+namespace llvm {<br>
+namespace ARM {<br>
+<br>
+enum ArchKind {<br>
+ INVALID_ARCH = 0<br>
+<br>
+#define ARM_ARCH_NAME(NAME, ID, DEFAULT_CPU_NAME, DEFAULT_CPU_ARCH) , ID<br>
+#include "ARMArchName.def"<br>
+};<br>
+<br>
+} // namespace ARM<br>
+} // namespace llvm<br>
+<br>
+#endif // ARMARCHNAME_H<br>
<br>
Modified: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp?rev=197052&r1=197051&r2=197052&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp?rev=197052&r1=197051&r2=197052&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp (original)<br>
+++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp Wed Dec 11 11:16:25 2013<br>
@@ -14,6 +14,7 @@<br>
//===----------------------------------------------------------------------===//<br>
<br>
#include "ARMBuildAttrs.h"<br>
+#include "ARMArchName.h"<br>
#include "ARMFPUName.h"<br>
#include "ARMRegisterInfo.h"<br>
#include "ARMUnwindOp.h"<br>
@@ -61,6 +62,42 @@ static const char *GetFPUName(unsigned I<br>
return NULL;<br>
}<br>
<br>
+static const char *GetArchName(unsigned ID) {<br>
+ switch (ID) {<br>
+ default:<br>
+ llvm_unreachable("Unknown ARCH kind");<br>
+ break;<br>
+#define ARM_ARCH_NAME(NAME, ID, DEFAULT_CPU_NAME, DEFAULT_CPU_ARCH) \<br>
+ case ARM::ID: return NAME;<br>
+#include "ARMArchName.def"<br>
+ }<br>
+ return NULL;<br>
+}<br>
+<br>
+static const char *GetArchDefaultCPUName(unsigned ID) {<br>
+ switch (ID) {<br>
+ default:<br>
+ llvm_unreachable("Unknown ARCH kind");<br>
+ break;<br>
+#define ARM_ARCH_NAME(NAME, ID, DEFAULT_CPU_NAME, DEFAULT_CPU_ARCH) \<br>
+ case ARM::ID: return DEFAULT_CPU_NAME;<br>
+#include "ARMArchName.def"<br>
+ }<br>
+ return NULL;<br>
+}<br>
+<br>
+static unsigned GetArchDefaultCPUArch(unsigned ID) {<br>
+ switch (ID) {<br>
+ default:<br>
+ llvm_unreachable("Unknown ARCH kind");<br>
+ break;<br>
+#define ARM_ARCH_NAME(NAME, ID, DEFAULT_CPU_NAME, DEFAULT_CPU_ARCH) \<br>
+ case ARM::ID: return ARMBuildAttrs::DEFAULT_CPU_ARCH;<br>
+#include "ARMArchName.def"<br>
+ }<br>
+ return 0;<br>
+}<br>
+<br>
namespace {<br>
<br>
class ARMELFStreamer;<br>
@@ -82,6 +119,7 @@ class ARMTargetAsmStreamer : public ARMT<br>
virtual void switchVendor(StringRef Vendor);<br>
virtual void emitAttribute(unsigned Attribute, unsigned Value);<br>
virtual void emitTextAttribute(unsigned Attribute, StringRef String);<br>
+ virtual void emitArch(unsigned Arch);<br>
virtual void emitFPU(unsigned FPU);<br>
virtual void finishAttributeSection();<br>
<br>
@@ -143,6 +181,9 @@ void ARMTargetAsmStreamer::emitTextAttri<br>
break;<br>
}<br>
}<br>
+void ARMTargetAsmStreamer::emitArch(unsigned Arch) {<br>
+ OS << "\t.arch\t" << GetArchName(Arch) << "\n";<br>
+}<br>
void ARMTargetAsmStreamer::emitFPU(unsigned FPU) {<br>
OS << "\t.fpu\t" << GetFPUName(FPU) << "\n";<br>
}<br>
@@ -171,6 +212,7 @@ private:<br>
<br>
StringRef CurrentVendor;<br>
unsigned FPU;<br>
+ unsigned Arch;<br>
SmallVector<AttributeItem, 64> Contents;<br>
<br>
const MCSection *AttributeSection;<br>
@@ -233,6 +275,7 @@ private:<br>
Contents.push_back(Item);<br>
}<br>
<br>
+ void emitArchDefaultAttributes();<br>
void emitFPUDefaultAttributes();<br>
<br>
ARMELFStreamer &getStreamer();<br>
@@ -250,6 +293,7 @@ private:<br>
virtual void switchVendor(StringRef Vendor);<br>
virtual void emitAttribute(unsigned Attribute, unsigned Value);<br>
virtual void emitTextAttribute(unsigned Attribute, StringRef String);<br>
+ virtual void emitArch(unsigned Arch);<br>
virtual void emitFPU(unsigned FPU);<br>
virtual void finishAttributeSection();<br>
<br>
@@ -258,7 +302,7 @@ private:<br>
public:<br>
ARMTargetELFStreamer()<br>
: ARMTargetStreamer(), CurrentVendor("aeabi"), FPU(ARM::INVALID_FPU),<br>
- AttributeSection(0) {<br>
+ Arch(ARM::INVALID_ARCH), AttributeSection(0) {<br>
}<br>
};<br>
<br>
@@ -491,6 +535,96 @@ void ARMTargetELFStreamer::emitTextAttri<br>
StringRef Value) {<br>
setAttributeItem(Attribute, Value, /* OverwriteExisting= */ true);<br>
}<br>
+void ARMTargetELFStreamer::emitArch(unsigned Value) {<br>
+ Arch = Value;<br>
+}<br>
+void ARMTargetELFStreamer::emitArchDefaultAttributes() {<br>
+ using namespace ARMBuildAttrs;<br>
+ setAttributeItem(CPU_name, GetArchDefaultCPUName(Arch), false);<br>
+ setAttributeItem(CPU_arch, GetArchDefaultCPUArch(Arch), false);<br>
+<br>
+ switch (Arch) {<br>
+ case ARM::ARMV2:<br>
+ case ARM::ARMV2A:<br>
+ case ARM::ARMV3:<br>
+ case ARM::ARMV3M:<br>
+ case ARM::ARMV4:<br>
+ case ARM::ARMV5:<br>
+ setAttributeItem(ARM_ISA_use, Allowed, false);<br>
+ break;<br>
+<br>
+ case ARM::ARMV4T:<br>
+ case ARM::ARMV5T:<br>
+ case ARM::ARMV5TE:<br>
+ case ARM::ARMV6:<br>
+ case ARM::ARMV6J:<br>
+ setAttributeItem(ARM_ISA_use, Allowed, false);<br>
+ setAttributeItem(THUMB_ISA_use, Allowed, false);<br>
+ break;<br>
+<br>
+ case ARM::ARMV6T2:<br>
+ setAttributeItem(ARM_ISA_use, Allowed, false);<br>
+ setAttributeItem(THUMB_ISA_use, AllowThumb32, false);<br>
+ break;<br>
+<br>
+ case ARM::ARMV6Z:<br>
+ case ARM::ARMV6ZK:<br>
+ setAttributeItem(ARM_ISA_use, Allowed, false);<br>
+ setAttributeItem(THUMB_ISA_use, Allowed, false);<br>
+ setAttributeItem(Virtualization_use, AllowTZ, false);<br>
+ break;<br>
+<br>
+ case ARM::ARMV6M:<br>
+ setAttributeItem(CPU_arch_profile, MicroControllerProfile, false);<br>
+ setAttributeItem(THUMB_ISA_use, Allowed, false);<br>
+ break;<br>
+<br>
+ case ARM::ARMV7:<br>
+ setAttributeItem(THUMB_ISA_use, AllowThumb32, false);<br>
+ break;<br>
+<br>
+ case ARM::ARMV7A:<br>
+ setAttributeItem(CPU_arch_profile, ApplicationProfile, false);<br>
+ setAttributeItem(ARM_ISA_use, Allowed, false);<br>
+ setAttributeItem(THUMB_ISA_use, AllowThumb32, false);<br>
+ break;<br>
+<br>
+ case ARM::ARMV7R:<br>
+ setAttributeItem(CPU_arch_profile, RealTimeProfile, false);<br>
+ setAttributeItem(ARM_ISA_use, Allowed, false);<br>
+ setAttributeItem(THUMB_ISA_use, AllowThumb32, false);<br>
+ break;<br>
+<br>
+ case ARM::ARMV7M:<br>
+ setAttributeItem(CPU_arch_profile, MicroControllerProfile, false);<br>
+ setAttributeItem(THUMB_ISA_use, AllowThumb32, false);<br>
+ break;<br>
+<br>
+ case ARM::ARMV8A:<br>
+ setAttributeItem(CPU_arch_profile, ApplicationProfile, false);<br>
+ setAttributeItem(ARM_ISA_use, Allowed, false);<br>
+ setAttributeItem(THUMB_ISA_use, AllowThumb32, false);<br>
+ setAttributeItem(MPextension_use, Allowed, false);<br>
+ setAttributeItem(Virtualization_use, AllowTZVirtualization, false);<br>
+ break;<br>
+<br>
+ case ARM::IWMMXT:<br>
+ setAttributeItem(ARM_ISA_use, Allowed, false);<br>
+ setAttributeItem(THUMB_ISA_use, Allowed, false);<br>
+ setAttributeItem(WMMX_arch, AllowWMMXv1, false);<br>
+ break;<br>
+<br>
+ case ARM::IWMMXT2:<br>
+ setAttributeItem(ARM_ISA_use, Allowed, false);<br>
+ setAttributeItem(THUMB_ISA_use, Allowed, false);<br>
+ setAttributeItem(WMMX_arch, AllowWMMXv2, false);<br>
+ break;<br>
+<br>
+ default:<br>
+ report_fatal_error("Unknown Arch: " + Twine(Arch));<br>
+ break;<br>
+ }<br>
+}<br>
void ARMTargetELFStreamer::emitFPU(unsigned Value) {<br>
FPU = Value;<br>
}<br>
@@ -597,6 +731,9 @@ void ARMTargetELFStreamer::finishAttribu<br>
if (FPU != ARM::INVALID_FPU)<br>
emitFPUDefaultAttributes();<br>
<br>
+ if (Arch != ARM::INVALID_ARCH)<br>
+ emitArchDefaultAttributes();<br>
+<br>
if (Contents.empty())<br>
return;<br>
<br>
<br>
Added: llvm/trunk/test/MC/ARM/directive-arch-armv2.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv2.s?rev=197052&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv2.s?rev=197052&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/ARM/directive-arch-armv2.s (added)<br>
+++ llvm/trunk/test/MC/ARM/directive-arch-armv2.s Wed Dec 11 11:16:25 2013<br>
@@ -0,0 +1,30 @@<br>
+@ Test the .arch directive for armv2<br>
+<br>
+@ This test case will check the default .ARM.attributes value for the<br>
+@ armv2 architecture.<br>
+<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=asm \<br>
+@ RUN: | FileCheck %s --check-prefix=CHECK-ASM<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=obj \<br>
+@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ<br>
+<br>
+ .syntax unified<br>
+ .arch armv2<br>
+<br>
+@ CHECK-ASM: .arch armv2<br>
+<br>
+@ CHECK-OBJ: Name: .ARM.attributes<br>
+@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)<br>
+@ CHECK-OBJ: Flags [ (0x0)<br>
+@ CHECK-OBJ: ]<br>
+@ CHECK-OBJ: Address: 0x0<br>
+@ CHECK-OBJ: Offset: 0x34<br>
+@ CHECK-OBJ: Size: 23<br>
+@ CHECK-OBJ: Link: 0<br>
+@ CHECK-OBJ: Info: 0<br>
+@ CHECK-OBJ: AddressAlignment: 1<br>
+@ CHECK-OBJ: EntrySize: 0<br>
+@ CHECK-OBJ: SectionData (<br>
+@ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000 |A....aeabi......|<br>
+@ CHECK-OBJ: 0010: 05320006 010801 |.2.....|<br>
+@ CHECK-OBJ: )<br>
<br>
Added: llvm/trunk/test/MC/ARM/directive-arch-armv2a.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv2a.s?rev=197052&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv2a.s?rev=197052&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/ARM/directive-arch-armv2a.s (added)<br>
+++ llvm/trunk/test/MC/ARM/directive-arch-armv2a.s Wed Dec 11 11:16:25 2013<br>
@@ -0,0 +1,30 @@<br>
+@ Test the .arch directive for armv2a<br>
+<br>
+@ This test case will check the default .ARM.attributes value for the<br>
+@ armv2a architecture.<br>
+<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=asm \<br>
+@ RUN: | FileCheck %s --check-prefix=CHECK-ASM<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=obj \<br>
+@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ<br>
+<br>
+ .syntax unified<br>
+ .arch armv2a<br>
+<br>
+@ CHECK-ASM: .arch armv2a<br>
+<br>
+@ CHECK-OBJ: Name: .ARM.attributes<br>
+@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)<br>
+@ CHECK-OBJ: Flags [ (0x0)<br>
+@ CHECK-OBJ: ]<br>
+@ CHECK-OBJ: Address: 0x0<br>
+@ CHECK-OBJ: Offset: 0x34<br>
+@ CHECK-OBJ: Size: 24<br>
+@ CHECK-OBJ: Link: 0<br>
+@ CHECK-OBJ: Info: 0<br>
+@ CHECK-OBJ: AddressAlignment: 1<br>
+@ CHECK-OBJ: EntrySize: 0<br>
+@ CHECK-OBJ: SectionData (<br>
+@ CHECK-OBJ: 0000: 41170000 00616561 62690001 0D000000 |A....aeabi......|<br>
+@ CHECK-OBJ: 0010: 05324100 06010801 |.2A.....|<br>
+@ CHECK-OBJ: )<br>
<br>
Added: llvm/trunk/test/MC/ARM/directive-arch-armv3.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv3.s?rev=197052&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv3.s?rev=197052&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/ARM/directive-arch-armv3.s (added)<br>
+++ llvm/trunk/test/MC/ARM/directive-arch-armv3.s Wed Dec 11 11:16:25 2013<br>
@@ -0,0 +1,30 @@<br>
+@ Test the .arch directive for armv3<br>
+<br>
+@ This test case will check the default .ARM.attributes value for the<br>
+@ armv3 architecture.<br>
+<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=asm \<br>
+@ RUN: | FileCheck %s --check-prefix=CHECK-ASM<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=obj \<br>
+@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ<br>
+<br>
+ .syntax unified<br>
+ .arch armv3<br>
+<br>
+@ CHECK-ASM: .arch armv3<br>
+<br>
+@ CHECK-OBJ: Name: .ARM.attributes<br>
+@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)<br>
+@ CHECK-OBJ: Flags [ (0x0)<br>
+@ CHECK-OBJ: ]<br>
+@ CHECK-OBJ: Address: 0x0<br>
+@ CHECK-OBJ: Offset: 0x34<br>
+@ CHECK-OBJ: Size: 23<br>
+@ CHECK-OBJ: Link: 0<br>
+@ CHECK-OBJ: Info: 0<br>
+@ CHECK-OBJ: AddressAlignment: 1<br>
+@ CHECK-OBJ: EntrySize: 0<br>
+@ CHECK-OBJ: SectionData (<br>
+@ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000 |A....aeabi......|<br>
+@ CHECK-OBJ: 0010: 05330006 010801 |.3.....|<br>
+@ CHECK-OBJ: )<br>
<br>
Added: llvm/trunk/test/MC/ARM/directive-arch-armv3m.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv3m.s?rev=197052&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv3m.s?rev=197052&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/ARM/directive-arch-armv3m.s (added)<br>
+++ llvm/trunk/test/MC/ARM/directive-arch-armv3m.s Wed Dec 11 11:16:25 2013<br>
@@ -0,0 +1,30 @@<br>
+@ Test the .arch directive for armv3m<br>
+<br>
+@ This test case will check the default .ARM.attributes value for the<br>
+@ armv3m architecture.<br>
+<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=asm \<br>
+@ RUN: | FileCheck %s --check-prefix=CHECK-ASM<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=obj \<br>
+@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ<br>
+<br>
+ .syntax unified<br>
+ .arch armv3m<br>
+<br>
+@ CHECK-ASM: .arch armv3m<br>
+<br>
+@ CHECK-OBJ: Name: .ARM.attributes<br>
+@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)<br>
+@ CHECK-OBJ: Flags [ (0x0)<br>
+@ CHECK-OBJ: ]<br>
+@ CHECK-OBJ: Address: 0x0<br>
+@ CHECK-OBJ: Offset: 0x34<br>
+@ CHECK-OBJ: Size: 24<br>
+@ CHECK-OBJ: Link: 0<br>
+@ CHECK-OBJ: Info: 0<br>
+@ CHECK-OBJ: AddressAlignment: 1<br>
+@ CHECK-OBJ: EntrySize: 0<br>
+@ CHECK-OBJ: SectionData (<br>
+@ CHECK-OBJ: 0000: 41170000 00616561 62690001 0D000000 |A....aeabi......|<br>
+@ CHECK-OBJ: 0010: 05334D00 06010801 |.3M.....|<br>
+@ CHECK-OBJ: )<br>
<br>
Added: llvm/trunk/test/MC/ARM/directive-arch-armv4.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv4.s?rev=197052&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv4.s?rev=197052&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/ARM/directive-arch-armv4.s (added)<br>
+++ llvm/trunk/test/MC/ARM/directive-arch-armv4.s Wed Dec 11 11:16:25 2013<br>
@@ -0,0 +1,30 @@<br>
+@ Test the .arch directive for armv4<br>
+<br>
+@ This test case will check the default .ARM.attributes value for the<br>
+@ armv4 architecture.<br>
+<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=asm \<br>
+@ RUN: | FileCheck %s --check-prefix=CHECK-ASM<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=obj \<br>
+@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ<br>
+<br>
+ .syntax unified<br>
+ .arch armv4<br>
+<br>
+@ CHECK-ASM: .arch armv4<br>
+<br>
+@ CHECK-OBJ: Name: .ARM.attributes<br>
+@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)<br>
+@ CHECK-OBJ: Flags [ (0x0)<br>
+@ CHECK-OBJ: ]<br>
+@ CHECK-OBJ: Address: 0x0<br>
+@ CHECK-OBJ: Offset: 0x34<br>
+@ CHECK-OBJ: Size: 23<br>
+@ CHECK-OBJ: Link: 0<br>
+@ CHECK-OBJ: Info: 0<br>
+@ CHECK-OBJ: AddressAlignment: 1<br>
+@ CHECK-OBJ: EntrySize: 0<br>
+@ CHECK-OBJ: SectionData (<br>
+@ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000 |A....aeabi......|<br>
+@ CHECK-OBJ: 0010: 05340006 010801 |.4.....|<br>
+@ CHECK-OBJ: )<br>
<br>
Added: llvm/trunk/test/MC/ARM/directive-arch-armv4t.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv4t.s?rev=197052&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv4t.s?rev=197052&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/ARM/directive-arch-armv4t.s (added)<br>
+++ llvm/trunk/test/MC/ARM/directive-arch-armv4t.s Wed Dec 11 11:16:25 2013<br>
@@ -0,0 +1,30 @@<br>
+@ Test the .arch directive for armv4t<br>
+<br>
+@ This test case will check the default .ARM.attributes value for the<br>
+@ armv4t architecture.<br>
+<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=asm \<br>
+@ RUN: | FileCheck %s --check-prefix=CHECK-ASM<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=obj \<br>
+@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ<br>
+<br>
+ .syntax unified<br>
+ .arch armv4t<br>
+<br>
+@ CHECK-ASM: .arch armv4t<br>
+<br>
+@ CHECK-OBJ: Name: .ARM.attributes<br>
+@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)<br>
+@ CHECK-OBJ: Flags [ (0x0)<br>
+@ CHECK-OBJ: ]<br>
+@ CHECK-OBJ: Address: 0x0<br>
+@ CHECK-OBJ: Offset: 0x34<br>
+@ CHECK-OBJ: Size: 26<br>
+@ CHECK-OBJ: Link: 0<br>
+@ CHECK-OBJ: Info: 0<br>
+@ CHECK-OBJ: AddressAlignment: 1<br>
+@ CHECK-OBJ: EntrySize: 0<br>
+@ CHECK-OBJ: SectionData (<br>
+@ CHECK-OBJ: 0000: 41190000 00616561 62690001 0F000000 |A....aeabi......|<br>
+@ CHECK-OBJ: 0010: 05345400 06020801 0901 |.4T.......|<br>
+@ CHECK-OBJ: )<br>
<br>
Added: llvm/trunk/test/MC/ARM/directive-arch-armv5.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv5.s?rev=197052&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv5.s?rev=197052&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/ARM/directive-arch-armv5.s (added)<br>
+++ llvm/trunk/test/MC/ARM/directive-arch-armv5.s Wed Dec 11 11:16:25 2013<br>
@@ -0,0 +1,30 @@<br>
+@ Test the .arch directive for armv5<br>
+<br>
+@ This test case will check the default .ARM.attributes value for the<br>
+@ armv5 architecture.<br>
+<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=asm \<br>
+@ RUN: | FileCheck %s --check-prefix=CHECK-ASM<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=obj \<br>
+@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ<br>
+<br>
+ .syntax unified<br>
+ .arch armv5<br>
+<br>
+@ CHECK-ASM: .arch armv5<br>
+<br>
+@ CHECK-OBJ: Name: .ARM.attributes<br>
+@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)<br>
+@ CHECK-OBJ: Flags [ (0x0)<br>
+@ CHECK-OBJ: ]<br>
+@ CHECK-OBJ: Address: 0x0<br>
+@ CHECK-OBJ: Offset: 0x34<br>
+@ CHECK-OBJ: Size: 23<br>
+@ CHECK-OBJ: Link: 0<br>
+@ CHECK-OBJ: Info: 0<br>
+@ CHECK-OBJ: AddressAlignment: 1<br>
+@ CHECK-OBJ: EntrySize: 0<br>
+@ CHECK-OBJ: SectionData (<br>
+@ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000 |A....aeabi......|<br>
+@ CHECK-OBJ: 0010: 05350006 030801 |.5.....|<br>
+@ CHECK-OBJ: )<br>
<br>
Added: llvm/trunk/test/MC/ARM/directive-arch-armv5t.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv5t.s?rev=197052&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv5t.s?rev=197052&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/ARM/directive-arch-armv5t.s (added)<br>
+++ llvm/trunk/test/MC/ARM/directive-arch-armv5t.s Wed Dec 11 11:16:25 2013<br>
@@ -0,0 +1,30 @@<br>
+@ Test the .arch directive for armv5t<br>
+<br>
+@ This test case will check the default .ARM.attributes value for the<br>
+@ armv5t architecture.<br>
+<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=asm \<br>
+@ RUN: | FileCheck %s --check-prefix=CHECK-ASM<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=obj \<br>
+@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ<br>
+<br>
+ .syntax unified<br>
+ .arch armv5t<br>
+<br>
+@ CHECK-ASM: .arch armv5t<br>
+<br>
+@ CHECK-OBJ: Name: .ARM.attributes<br>
+@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)<br>
+@ CHECK-OBJ: Flags [ (0x0)<br>
+@ CHECK-OBJ: ]<br>
+@ CHECK-OBJ: Address: 0x0<br>
+@ CHECK-OBJ: Offset: 0x34<br>
+@ CHECK-OBJ: Size: 26<br>
+@ CHECK-OBJ: Link: 0<br>
+@ CHECK-OBJ: Info: 0<br>
+@ CHECK-OBJ: AddressAlignment: 1<br>
+@ CHECK-OBJ: EntrySize: 0<br>
+@ CHECK-OBJ: SectionData (<br>
+@ CHECK-OBJ: 0000: 41190000 00616561 62690001 0F000000 |A....aeabi......|<br>
+@ CHECK-OBJ: 0010: 05355400 06030801 0901 |.5T.......|<br>
+@ CHECK-OBJ: )<br>
<br>
Added: llvm/trunk/test/MC/ARM/directive-arch-armv5te.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv5te.s?rev=197052&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv5te.s?rev=197052&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/ARM/directive-arch-armv5te.s (added)<br>
+++ llvm/trunk/test/MC/ARM/directive-arch-armv5te.s Wed Dec 11 11:16:25 2013<br>
@@ -0,0 +1,30 @@<br>
+@ Test the .arch directive for armv5te<br>
+<br>
+@ This test case will check the default .ARM.attributes value for the<br>
+@ armv5te architecture.<br>
+<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=asm \<br>
+@ RUN: | FileCheck %s --check-prefix=CHECK-ASM<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=obj \<br>
+@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ<br>
+<br>
+ .syntax unified<br>
+ .arch armv5te<br>
+<br>
+@ CHECK-ASM: .arch armv5te<br>
+<br>
+@ CHECK-OBJ: Name: .ARM.attributes<br>
+@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)<br>
+@ CHECK-OBJ: Flags [ (0x0)<br>
+@ CHECK-OBJ: ]<br>
+@ CHECK-OBJ: Address: 0x0<br>
+@ CHECK-OBJ: Offset: 0x34<br>
+@ CHECK-OBJ: Size: 27<br>
+@ CHECK-OBJ: Link: 0<br>
+@ CHECK-OBJ: Info: 0<br>
+@ CHECK-OBJ: AddressAlignment: 1<br>
+@ CHECK-OBJ: EntrySize: 0<br>
+@ CHECK-OBJ: SectionData (<br>
+@ CHECK-OBJ: 0000: 411A0000 00616561 62690001 10000000 |A....aeabi......|<br>
+@ CHECK-OBJ: 0010: 05355445 00060408 010901 |.5TE.......|<br>
+@ CHECK-OBJ: )<br>
<br>
Added: llvm/trunk/test/MC/ARM/directive-arch-armv6-m.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv6-m.s?rev=197052&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv6-m.s?rev=197052&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/ARM/directive-arch-armv6-m.s (added)<br>
+++ llvm/trunk/test/MC/ARM/directive-arch-armv6-m.s Wed Dec 11 11:16:25 2013<br>
@@ -0,0 +1,30 @@<br>
+@ Test the .arch directive for armv6-m<br>
+<br>
+@ This test case will check the default .ARM.attributes value for the<br>
+@ armv6-m architecture.<br>
+<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=asm \<br>
+@ RUN: | FileCheck %s --check-prefix=CHECK-ASM<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=obj \<br>
+@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ<br>
+<br>
+ .syntax unified<br>
+ .arch armv6-m<br>
+<br>
+@ CHECK-ASM: .arch armv6-m<br>
+<br>
+@ CHECK-OBJ: Name: .ARM.attributes<br>
+@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)<br>
+@ CHECK-OBJ: Flags [ (0x0)<br>
+@ CHECK-OBJ: ]<br>
+@ CHECK-OBJ: Address: 0x0<br>
+@ CHECK-OBJ: Offset: 0x34<br>
+@ CHECK-OBJ: Size: 27<br>
+@ CHECK-OBJ: Link: 0<br>
+@ CHECK-OBJ: Info: 0<br>
+@ CHECK-OBJ: AddressAlignment: 1<br>
+@ CHECK-OBJ: EntrySize: 0<br>
+@ CHECK-OBJ: SectionData (<br>
+@ CHECK-OBJ: 0000: 411A0000 00616561 62690001 10000000 |A....aeabi......|<br>
+@ CHECK-OBJ: 0010: 05362D4D 00060B07 4D0901 |.6-M....M..|<br>
+@ CHECK-OBJ: )<br>
<br>
Added: llvm/trunk/test/MC/ARM/directive-arch-armv6.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv6.s?rev=197052&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv6.s?rev=197052&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/ARM/directive-arch-armv6.s (added)<br>
+++ llvm/trunk/test/MC/ARM/directive-arch-armv6.s Wed Dec 11 11:16:25 2013<br>
@@ -0,0 +1,30 @@<br>
+@ Test the .arch directive for armv6<br>
+<br>
+@ This test case will check the default .ARM.attributes value for the<br>
+@ armv6 architecture.<br>
+<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=asm \<br>
+@ RUN: | FileCheck %s --check-prefix=CHECK-ASM<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=obj \<br>
+@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ<br>
+<br>
+ .syntax unified<br>
+ .arch armv6<br>
+<br>
+@ CHECK-ASM: .arch armv6<br>
+<br>
+@ CHECK-OBJ: Name: .ARM.attributes<br>
+@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)<br>
+@ CHECK-OBJ: Flags [ (0x0)<br>
+@ CHECK-OBJ: ]<br>
+@ CHECK-OBJ: Address: 0x0<br>
+@ CHECK-OBJ: Offset: 0x34<br>
+@ CHECK-OBJ: Size: 25<br>
+@ CHECK-OBJ: Link: 0<br>
+@ CHECK-OBJ: Info: 0<br>
+@ CHECK-OBJ: AddressAlignment: 1<br>
+@ CHECK-OBJ: EntrySize: 0<br>
+@ CHECK-OBJ: SectionData (<br>
+@ CHECK-OBJ: 0000: 41180000 00616561 62690001 0E000000 |A....aeabi......|<br>
+@ CHECK-OBJ: 0010: 05360006 06080109 01 |.6.......|<br>
+@ CHECK-OBJ: )<br>
<br>
Added: llvm/trunk/test/MC/ARM/directive-arch-armv6j.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv6j.s?rev=197052&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv6j.s?rev=197052&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/ARM/directive-arch-armv6j.s (added)<br>
+++ llvm/trunk/test/MC/ARM/directive-arch-armv6j.s Wed Dec 11 11:16:25 2013<br>
@@ -0,0 +1,30 @@<br>
+@ Test the .arch directive for armv6j<br>
+<br>
+@ This test case will check the default .ARM.attributes value for the<br>
+@ armv6j architecture.<br>
+<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=asm \<br>
+@ RUN: | FileCheck %s --check-prefix=CHECK-ASM<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=obj \<br>
+@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ<br>
+<br>
+ .syntax unified<br>
+ .arch armv6j<br>
+<br>
+@ CHECK-ASM: .arch armv6j<br>
+<br>
+@ CHECK-OBJ: Name: .ARM.attributes<br>
+@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)<br>
+@ CHECK-OBJ: Flags [ (0x0)<br>
+@ CHECK-OBJ: ]<br>
+@ CHECK-OBJ: Address: 0x0<br>
+@ CHECK-OBJ: Offset: 0x34<br>
+@ CHECK-OBJ: Size: 26<br>
+@ CHECK-OBJ: Link: 0<br>
+@ CHECK-OBJ: Info: 0<br>
+@ CHECK-OBJ: AddressAlignment: 1<br>
+@ CHECK-OBJ: EntrySize: 0<br>
+@ CHECK-OBJ: SectionData (<br>
+@ CHECK-OBJ: 0000: 41190000 00616561 62690001 0F000000 |A....aeabi......|<br>
+@ CHECK-OBJ: 0010: 05364A00 06060801 0901 |.6J.......|<br>
+@ CHECK-OBJ: )<br>
<br>
Added: llvm/trunk/test/MC/ARM/directive-arch-armv6t2.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv6t2.s?rev=197052&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv6t2.s?rev=197052&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/ARM/directive-arch-armv6t2.s (added)<br>
+++ llvm/trunk/test/MC/ARM/directive-arch-armv6t2.s Wed Dec 11 11:16:25 2013<br>
@@ -0,0 +1,30 @@<br>
+@ Test the .arch directive for armv6t2<br>
+<br>
+@ This test case will check the default .ARM.attributes value for the<br>
+@ armv6t2 architecture.<br>
+<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=asm \<br>
+@ RUN: | FileCheck %s --check-prefix=CHECK-ASM<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=obj \<br>
+@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ<br>
+<br>
+ .syntax unified<br>
+ .arch armv6t2<br>
+<br>
+@ CHECK-ASM: .arch armv6t2<br>
+<br>
+@ CHECK-OBJ: Name: .ARM.attributes<br>
+@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)<br>
+@ CHECK-OBJ: Flags [ (0x0)<br>
+@ CHECK-OBJ: ]<br>
+@ CHECK-OBJ: Address: 0x0<br>
+@ CHECK-OBJ: Offset: 0x34<br>
+@ CHECK-OBJ: Size: 27<br>
+@ CHECK-OBJ: Link: 0<br>
+@ CHECK-OBJ: Info: 0<br>
+@ CHECK-OBJ: AddressAlignment: 1<br>
+@ CHECK-OBJ: EntrySize: 0<br>
+@ CHECK-OBJ: SectionData (<br>
+@ CHECK-OBJ: 0000: 411A0000 00616561 62690001 10000000 |A....aeabi......|<br>
+@ CHECK-OBJ: 0010: 05365432 00060808 010902 |.6T2.......|<br>
+@ CHECK-OBJ: )<br>
<br>
Added: llvm/trunk/test/MC/ARM/directive-arch-armv6z.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv6z.s?rev=197052&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv6z.s?rev=197052&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/ARM/directive-arch-armv6z.s (added)<br>
+++ llvm/trunk/test/MC/ARM/directive-arch-armv6z.s Wed Dec 11 11:16:25 2013<br>
@@ -0,0 +1,30 @@<br>
+@ Test the .arch directive for armv6z<br>
+<br>
+@ This test case will check the default .ARM.attributes value for the<br>
+@ armv6z architecture.<br>
+<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=asm \<br>
+@ RUN: | FileCheck %s --check-prefix=CHECK-ASM<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=obj \<br>
+@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ<br>
+<br>
+ .syntax unified<br>
+ .arch armv6z<br>
+<br>
+@ CHECK-ASM: .arch armv6z<br>
+<br>
+@ CHECK-OBJ: Name: .ARM.attributes<br>
+@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)<br>
+@ CHECK-OBJ: Flags [ (0x0)<br>
+@ CHECK-OBJ: ]<br>
+@ CHECK-OBJ: Address: 0x0<br>
+@ CHECK-OBJ: Offset: 0x34<br>
+@ CHECK-OBJ: Size: 28<br>
+@ CHECK-OBJ: Link: 0<br>
+@ CHECK-OBJ: Info: 0<br>
+@ CHECK-OBJ: AddressAlignment: 1<br>
+@ CHECK-OBJ: EntrySize: 0<br>
+@ CHECK-OBJ: SectionData (<br>
+@ CHECK-OBJ: 0000: 411B0000 00616561 62690001 11000000 |A....aeabi......|<br>
+@ CHECK-OBJ: 0010: 05365A00 06070801 09014401 |.6Z.......D.|<br>
+@ CHECK-OBJ: )<br>
<br>
Added: llvm/trunk/test/MC/ARM/directive-arch-armv6zk.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv6zk.s?rev=197052&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv6zk.s?rev=197052&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/ARM/directive-arch-armv6zk.s (added)<br>
+++ llvm/trunk/test/MC/ARM/directive-arch-armv6zk.s Wed Dec 11 11:16:25 2013<br>
@@ -0,0 +1,30 @@<br>
+@ Test the .arch directive for armv6zk<br>
+<br>
+@ This test case will check the default .ARM.attributes value for the<br>
+@ armv6zk architecture.<br>
+<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=asm \<br>
+@ RUN: | FileCheck %s --check-prefix=CHECK-ASM<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=obj \<br>
+@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ<br>
+<br>
+ .syntax unified<br>
+ .arch armv6zk<br>
+<br>
+@ CHECK-ASM: .arch armv6zk<br>
+<br>
+@ CHECK-OBJ: Name: .ARM.attributes<br>
+@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)<br>
+@ CHECK-OBJ: Flags [ (0x0)<br>
+@ CHECK-OBJ: ]<br>
+@ CHECK-OBJ: Address: 0x0<br>
+@ CHECK-OBJ: Offset: 0x34<br>
+@ CHECK-OBJ: Size: 29<br>
+@ CHECK-OBJ: Link: 0<br>
+@ CHECK-OBJ: Info: 0<br>
+@ CHECK-OBJ: AddressAlignment: 1<br>
+@ CHECK-OBJ: EntrySize: 0<br>
+@ CHECK-OBJ: SectionData (<br>
+@ CHECK-OBJ: 0000: 411C0000 00616561 62690001 12000000 |A....aeabi......|<br>
+@ CHECK-OBJ: 0010: 05365A4B 00060708 01090144 01 |.6ZK.......D.|<br>
+@ CHECK-OBJ: )<br>
<br>
Added: llvm/trunk/test/MC/ARM/directive-arch-armv7-a.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv7-a.s?rev=197052&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv7-a.s?rev=197052&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/ARM/directive-arch-armv7-a.s (added)<br>
+++ llvm/trunk/test/MC/ARM/directive-arch-armv7-a.s Wed Dec 11 11:16:25 2013<br>
@@ -0,0 +1,30 @@<br>
+@ Test the .arch directive for armv7-a<br>
+<br>
+@ This test case will check the default .ARM.attributes value for the<br>
+@ armv7-a architecture.<br>
+<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=asm \<br>
+@ RUN: | FileCheck %s --check-prefix=CHECK-ASM<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=obj \<br>
+@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ<br>
+<br>
+ .syntax unified<br>
+ .arch armv7-a<br>
+<br>
+@ CHECK-ASM: .arch armv7-a<br>
+<br>
+@ CHECK-OBJ: Name: .ARM.attributes<br>
+@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)<br>
+@ CHECK-OBJ: Flags [ (0x0)<br>
+@ CHECK-OBJ: ]<br>
+@ CHECK-OBJ: Address: 0x0<br>
+@ CHECK-OBJ: Offset: 0x34<br>
+@ CHECK-OBJ: Size: 29<br>
+@ CHECK-OBJ: Link: 0<br>
+@ CHECK-OBJ: Info: 0<br>
+@ CHECK-OBJ: AddressAlignment: 1<br>
+@ CHECK-OBJ: EntrySize: 0<br>
+@ CHECK-OBJ: SectionData (<br>
+@ CHECK-OBJ: 0000: 411C0000 00616561 62690001 12000000 |A....aeabi......|<br>
+@ CHECK-OBJ: 0010: 05372D41 00060A07 41080109 02 |.7-A....A....|<br>
+@ CHECK-OBJ: )<br>
<br>
Added: llvm/trunk/test/MC/ARM/directive-arch-armv7-m.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv7-m.s?rev=197052&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv7-m.s?rev=197052&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/ARM/directive-arch-armv7-m.s (added)<br>
+++ llvm/trunk/test/MC/ARM/directive-arch-armv7-m.s Wed Dec 11 11:16:25 2013<br>
@@ -0,0 +1,30 @@<br>
+@ Test the .arch directive for armv7-m<br>
+<br>
+@ This test case will check the default .ARM.attributes value for the<br>
+@ armv7-m architecture.<br>
+<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=asm \<br>
+@ RUN: | FileCheck %s --check-prefix=CHECK-ASM<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=obj \<br>
+@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ<br>
+<br>
+ .syntax unified<br>
+ .arch armv7-m<br>
+<br>
+@ CHECK-ASM: .arch armv7-m<br>
+<br>
+@ CHECK-OBJ: Name: .ARM.attributes<br>
+@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)<br>
+@ CHECK-OBJ: Flags [ (0x0)<br>
+@ CHECK-OBJ: ]<br>
+@ CHECK-OBJ: Address: 0x0<br>
+@ CHECK-OBJ: Offset: 0x34<br>
+@ CHECK-OBJ: Size: 27<br>
+@ CHECK-OBJ: Link: 0<br>
+@ CHECK-OBJ: Info: 0<br>
+@ CHECK-OBJ: AddressAlignment: 1<br>
+@ CHECK-OBJ: EntrySize: 0<br>
+@ CHECK-OBJ: SectionData (<br>
+@ CHECK-OBJ: 0000: 411A0000 00616561 62690001 10000000 |A....aeabi......|<br>
+@ CHECK-OBJ: 0010: 05372D4D 00060A07 4D0902 |.7-M....M..|<br>
+@ CHECK-OBJ: )<br>
<br>
Added: llvm/trunk/test/MC/ARM/directive-arch-armv7-r.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv7-r.s?rev=197052&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv7-r.s?rev=197052&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/ARM/directive-arch-armv7-r.s (added)<br>
+++ llvm/trunk/test/MC/ARM/directive-arch-armv7-r.s Wed Dec 11 11:16:25 2013<br>
@@ -0,0 +1,30 @@<br>
+@ Test the .arch directive for armv7-r<br>
+<br>
+@ This test case will check the default .ARM.attributes value for the<br>
+@ armv7-r architecture.<br>
+<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=asm \<br>
+@ RUN: | FileCheck %s --check-prefix=CHECK-ASM<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=obj \<br>
+@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ<br>
+<br>
+ .syntax unified<br>
+ .arch armv7-r<br>
+<br>
+@ CHECK-ASM: .arch armv7-r<br>
+<br>
+@ CHECK-OBJ: Name: .ARM.attributes<br>
+@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)<br>
+@ CHECK-OBJ: Flags [ (0x0)<br>
+@ CHECK-OBJ: ]<br>
+@ CHECK-OBJ: Address: 0x0<br>
+@ CHECK-OBJ: Offset: 0x34<br>
+@ CHECK-OBJ: Size: 29<br>
+@ CHECK-OBJ: Link: 0<br>
+@ CHECK-OBJ: Info: 0<br>
+@ CHECK-OBJ: AddressAlignment: 1<br>
+@ CHECK-OBJ: EntrySize: 0<br>
+@ CHECK-OBJ: SectionData (<br>
+@ CHECK-OBJ: 0000: 411C0000 00616561 62690001 12000000 |A....aeabi......|<br>
+@ CHECK-OBJ: 0010: 05372D52 00060A07 52080109 02 |.7-R....R....|<br>
+@ CHECK-OBJ: )<br>
<br>
Added: llvm/trunk/test/MC/ARM/directive-arch-armv7.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv7.s?rev=197052&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv7.s?rev=197052&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/ARM/directive-arch-armv7.s (added)<br>
+++ llvm/trunk/test/MC/ARM/directive-arch-armv7.s Wed Dec 11 11:16:25 2013<br>
@@ -0,0 +1,30 @@<br>
+@ Test the .arch directive for armv7<br>
+<br>
+@ This test case will check the default .ARM.attributes value for the<br>
+@ armv7 architecture.<br>
+<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=asm \<br>
+@ RUN: | FileCheck %s --check-prefix=CHECK-ASM<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=obj \<br>
+@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ<br>
+<br>
+ .syntax unified<br>
+ .arch armv7<br>
+<br>
+@ CHECK-ASM: .arch armv7<br>
+<br>
+@ CHECK-OBJ: Name: .ARM.attributes<br>
+@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)<br>
+@ CHECK-OBJ: Flags [ (0x0)<br>
+@ CHECK-OBJ: ]<br>
+@ CHECK-OBJ: Address: 0x0<br>
+@ CHECK-OBJ: Offset: 0x34<br>
+@ CHECK-OBJ: Size: 23<br>
+@ CHECK-OBJ: Link: 0<br>
+@ CHECK-OBJ: Info: 0<br>
+@ CHECK-OBJ: AddressAlignment: 1<br>
+@ CHECK-OBJ: EntrySize: 0<br>
+@ CHECK-OBJ: SectionData (<br>
+@ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000 |A....aeabi......|<br>
+@ CHECK-OBJ: 0010: 05370006 0A0902 |.7.....|<br>
+@ CHECK-OBJ: )<br>
<br>
Added: llvm/trunk/test/MC/ARM/directive-arch-armv8-a.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv8-a.s?rev=197052&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv8-a.s?rev=197052&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/ARM/directive-arch-armv8-a.s (added)<br>
+++ llvm/trunk/test/MC/ARM/directive-arch-armv8-a.s Wed Dec 11 11:16:25 2013<br>
@@ -0,0 +1,31 @@<br>
+@ Test the .arch directive for armv8-a<br>
+<br>
+@ This test case will check the default .ARM.attributes value for the<br>
+@ armv8-a architecture.<br>
+<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=asm \<br>
+@ RUN: | FileCheck %s --check-prefix=CHECK-ASM<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=obj \<br>
+@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ<br>
+<br>
+ .syntax unified<br>
+ .arch armv8-a<br>
+<br>
+@ CHECK-ASM: .arch armv8-a<br>
+<br>
+@ CHECK-OBJ: Name: .ARM.attributes<br>
+@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)<br>
+@ CHECK-OBJ: Flags [ (0x0)<br>
+@ CHECK-OBJ: ]<br>
+@ CHECK-OBJ: Address: 0x0<br>
+@ CHECK-OBJ: Offset: 0x34<br>
+@ CHECK-OBJ: Size: 33<br>
+@ CHECK-OBJ: Link: 0<br>
+@ CHECK-OBJ: Info: 0<br>
+@ CHECK-OBJ: AddressAlignment: 1<br>
+@ CHECK-OBJ: EntrySize: 0<br>
+@ CHECK-OBJ: SectionData (<br>
+@ CHECK-OBJ: 0000: 41200000 00616561 62690001 16000000 |A ...aeabi......|<br>
+@ CHECK-OBJ: 0010: 05382D41 00060E07 41080109 022A0144 |.8-A....A....*.D|<br>
+@ CHECK-OBJ: 0020: 03 |.|<br>
+@ CHECK-OBJ: )<br>
<br>
Added: llvm/trunk/test/MC/ARM/directive-arch-iwmmxt.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-iwmmxt.s?rev=197052&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-iwmmxt.s?rev=197052&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/ARM/directive-arch-iwmmxt.s (added)<br>
+++ llvm/trunk/test/MC/ARM/directive-arch-iwmmxt.s Wed Dec 11 11:16:25 2013<br>
@@ -0,0 +1,30 @@<br>
+@ Test the .arch directive for iwmmxt<br>
+<br>
+@ This test case will check the default .ARM.attributes value for the<br>
+@ iwmmxt architecture.<br>
+<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=asm \<br>
+@ RUN: | FileCheck %s --check-prefix=CHECK-ASM<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=obj \<br>
+@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ<br>
+<br>
+ .syntax unified<br>
+ .arch iwmmxt<br>
+<br>
+@ CHECK-ASM: .arch iwmmxt<br>
+<br>
+@ CHECK-OBJ: Name: .ARM.attributes<br>
+@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)<br>
+@ CHECK-OBJ: Flags [ (0x0)<br>
+@ CHECK-OBJ: ]<br>
+@ CHECK-OBJ: Address: 0x0<br>
+@ CHECK-OBJ: Offset: 0x34<br>
+@ CHECK-OBJ: Size: 32<br>
+@ CHECK-OBJ: Link: 0<br>
+@ CHECK-OBJ: Info: 0<br>
+@ CHECK-OBJ: AddressAlignment: 1<br>
+@ CHECK-OBJ: EntrySize: 0<br>
+@ CHECK-OBJ: SectionData (<br>
+@ CHECK-OBJ: 0000: 411F0000 00616561 62690001 15000000 |A....aeabi......|<br>
+@ CHECK-OBJ: 0010: 0549574D 4D585400 06040801 09010B01 |.IWMMXT.........|<br>
+@ CHECK-OBJ: )<br>
<br>
Added: llvm/trunk/test/MC/ARM/directive-arch-iwmmxt2.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-iwmmxt2.s?rev=197052&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-iwmmxt2.s?rev=197052&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/ARM/directive-arch-iwmmxt2.s (added)<br>
+++ llvm/trunk/test/MC/ARM/directive-arch-iwmmxt2.s Wed Dec 11 11:16:25 2013<br>
@@ -0,0 +1,31 @@<br>
+@ Test the .arch directive for iwmmxt2<br>
+<br>
+@ This test case will check the default .ARM.attributes value for the<br>
+@ iwmmxt2 architecture.<br>
+<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=asm \<br>
+@ RUN: | FileCheck %s --check-prefix=CHECK-ASM<br>
+@ RUN: llvm-mc < %s -arch=arm -filetype=obj \<br>
+@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ<br>
+<br>
+ .syntax unified<br>
+ .arch iwmmxt2<br>
+<br>
+@ CHECK-ASM: .arch iwmmxt2<br>
+<br>
+@ CHECK-OBJ: Name: .ARM.attributes<br>
+@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)<br>
+@ CHECK-OBJ: Flags [ (0x0)<br>
+@ CHECK-OBJ: ]<br>
+@ CHECK-OBJ: Address: 0x0<br>
+@ CHECK-OBJ: Offset: 0x34<br>
+@ CHECK-OBJ: Size: 33<br>
+@ CHECK-OBJ: Link: 0<br>
+@ CHECK-OBJ: Info: 0<br>
+@ CHECK-OBJ: AddressAlignment: 1<br>
+@ CHECK-OBJ: EntrySize: 0<br>
+@ CHECK-OBJ: SectionData (<br>
+@ CHECK-OBJ: 0000: 41200000 00616561 62690001 16000000 |A ...aeabi......|<br>
+@ CHECK-OBJ: 0010: 0549574D 4D585432 00060408 0109010B |.IWMMXT2........|<br>
+@ CHECK-OBJ: 0020: 02 |.|<br>
+@ CHECK-OBJ: )<br>
<br>
<br>
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</blockquote></div><br></div>