[llvm] r195129 - Fix assembly operands for the SSE2 cvtsd2ss instruction.
Chad Rosier
mcrosier at codeaurora.org
Thu Nov 21 07:19:59 PST 2013
Hi Cameron,
Did this test case fail prior to your change?
You're test case produces a single cvtsd2ss instruction, but you have two
FileCheck directives. My thought is that the first CHECK is consuming the
cvtsd2ss token and thus the CHECK-NOT will always pass because there's no
second cvtsd2ss to match. Perhaps you could create two tests one to check
for what you expect and a second to check for what you don't expect?
I'm not a FileCheck expert, but hopefully that makes sense. :)
Chad
> Author: mcinally
> Date: Tue Nov 19 08:36:00 2013
> New Revision: 195129
>
> URL: http://llvm.org/viewvc/llvm-project?rev=195129&view=rev
> Log:
> Fix assembly operands for the SSE2 cvtsd2ss instruction.
>
> Modified:
> llvm/trunk/lib/Target/X86/X86InstrSSE.td
> llvm/trunk/test/CodeGen/X86/sse2-intrinsics-x86.ll
>
> Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=195129&r1=195128&r2=195129&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)
> +++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Tue Nov 19 08:36:00 2013
> @@ -1810,14 +1810,14 @@ def Int_VCVTSD2SSrm: I<0x5A, MRMSrcReg,
> let Constraints = "$src1 = $dst" in {
> def Int_CVTSD2SSrr: I<0x5A, MRMSrcReg,
> (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
> - "cvtsd2ss\t{$src2, $src1, $dst|$dst, $src1,
> $src2}",
> + "cvtsd2ss\t{$src2, $dst|$dst, $src2}",
> [(set VR128:$dst,
> (int_x86_sse2_cvtsd2ss VR128:$src1,
> VR128:$src2))],
> IIC_SSE_CVT_Scalar_RR>, XD, Requires<[UseSSE2]>,
> Sched<[WriteCvtF2F]>;
> def Int_CVTSD2SSrm: I<0x5A, MRMSrcReg,
> (outs VR128:$dst), (ins VR128:$src1, sdmem:$src2),
> - "cvtsd2ss\t{$src2, $src1, $dst|$dst, $src1,
> $src2}",
> + "cvtsd2ss\t{$src2, $dst|$dst, $src2}",
> [(set VR128:$dst, (int_x86_sse2_cvtsd2ss
> VR128:$src1,
> sse_load_f64:$src2))],
> IIC_SSE_CVT_Scalar_RM>, XD, Requires<[UseSSE2]>,
>
> Modified: llvm/trunk/test/CodeGen/X86/sse2-intrinsics-x86.ll
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse2-intrinsics-x86.ll?rev=195129&r1=195128&r2=195129&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/sse2-intrinsics-x86.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/sse2-intrinsics-x86.ll Tue Nov 19 08:36:00
> 2013
> @@ -142,6 +142,7 @@ declare i32 @llvm.x86.sse2.cvtsd2si(<2 x
>
> define <4 x float> @test_x86_sse2_cvtsd2ss(<4 x float> %a0, <2 x double>
> %a1) {
> ; CHECK: cvtsd2ss
> + ; CHECK-NOT: cvtsd2ss %xmm{{[0-9]+}}, %xmm{{[0-9]+}}, %xmm{{[0-9]+}}
> %res = call <4 x float> @llvm.x86.sse2.cvtsd2ss(<4 x float> %a0, <2 x
> double> %a1) ; <<4 x float>> [#uses=1]
> ret <4 x float> %res
> }
>
>
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