[PATCH] [ARM] Implement eabi_attribute, cpu, and fpu directives.

[Richard Barton]

  Hi Logan

  One last problem with the R5 definition that will require a test change and this patch is good to commit.

  Thanks for contributing and for the adding all the extra testing to make sure its just right.

  Rich


================
Comment at: lib/Target/ARM/ARM.td:324
@@ -323,2 +323,3 @@
                                      FeatureT2XtPk, FeatureVFP4,
-                                     FeatureVFPOnlySP, FeatureMClass]>;
+                                     FeatureVFPOnlySP, FeatureD16,
+                                     FeatureMClass]>;
----------------
Logan Chien wrote:
> According to ARMv7-M Reference Manual, the ARM floating point extension for ARMv7-M is named as FPV4-SP, which is a single precision only variant of VFPv4-d16.  Thus, I think we should add FeatureD16 to this subtarget.
Absolutely correct.

================
Comment at: lib/Target/ARM/ARM.td:312
@@ -311,3 +311,3 @@
                                      FeatureHasRAS, FeatureVFPOnlySP,
-                                     FeatureRClass]>;
+                                     FeatureD16, FeatureRClass]>;
 
----------------
Logan Chien wrote:
> For not breaking the existing test cases, I have to add FeatureD16 to cortex-r5 subtarget.  Although this is the default behavior of GCC, however, I can't find any document stating cortex-r5 has only d0-d15.  Should I change the test case instead?
The TRM for Cortex-R5 shows this here http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0460d/I1019986.html

So your patch is correct.

================
Comment at: test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll:258
@@ +257,3 @@
+; CORTEX-R5-NEXT:   0020: 0109020A 04140115 01170318 0119012C
+; CORTEX-R5-NEXT:   0030: 02
+; CORTEX-R5-NEXT: )
----------------
One last problem - the R5 has been specified incorrectly and shouldn't support the ARM divide extension. So Tag_DIV_use should not be emitted, or emitted with value 0. I think just correcting the definition of R5 in ARM.td ought to just sort this out though.


http://llvm-reviews.chandlerc.com/D1987