[llvm] r192398 - Print register in LiveInterval::print()
Matthias Braun
matze at braunis.de
Thu Oct 10 14:29:06 PDT 2013
Author: matze
Date: Thu Oct 10 16:29:05 2013
New Revision: 192398
URL: http://llvm.org/viewvc/llvm-project?rev=192398&view=rev
Log:
Print register in LiveInterval::print()
Modified:
llvm/trunk/include/llvm/CodeGen/LiveInterval.h
llvm/trunk/lib/CodeGen/InlineSpiller.cpp
llvm/trunk/lib/CodeGen/LiveInterval.cpp
llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
llvm/trunk/lib/CodeGen/MachineVerifier.cpp
llvm/trunk/lib/CodeGen/RegAllocBase.cpp
llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp
Modified: llvm/trunk/include/llvm/CodeGen/LiveInterval.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveInterval.h?rev=192398&r1=192397&r2=192398&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/LiveInterval.h (original)
+++ llvm/trunk/include/llvm/CodeGen/LiveInterval.h Thu Oct 10 16:29:05 2013
@@ -527,6 +527,8 @@ namespace llvm {
/// or stack slot.
class LiveInterval : public LiveRange {
public:
+ typedef LiveRange super;
+
const unsigned reg; // the register or stack slot of this interval.
float weight; // weight of this interval
@@ -554,6 +556,9 @@ namespace llvm {
(thisIndex == otherIndex && reg < other.reg);
}
+ void print(raw_ostream &OS) const;
+ void dump() const;
+
private:
LiveInterval& operator=(const LiveInterval& rhs) LLVM_DELETED_FUNCTION;
Modified: llvm/trunk/lib/CodeGen/InlineSpiller.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/InlineSpiller.cpp?rev=192398&r1=192397&r2=192398&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/InlineSpiller.cpp (original)
+++ llvm/trunk/lib/CodeGen/InlineSpiller.cpp Thu Oct 10 16:29:05 2013
@@ -1337,7 +1337,7 @@ void InlineSpiller::spill(LiveRangeEdit
DEBUG(dbgs() << "Inline spilling "
<< MRI.getRegClass(edit.getReg())->getName()
- << ':' << PrintReg(edit.getReg()) << ' ' << edit.getParent()
+ << ':' << edit.getParent()
<< "\nFrom original " << PrintReg(Original) << '\n');
assert(edit.getParent().isSpillable() &&
"Attempting to spill already spilled value.");
Modified: llvm/trunk/lib/CodeGen/LiveInterval.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveInterval.cpp?rev=192398&r1=192397&r2=192398&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LiveInterval.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveInterval.cpp Thu Oct 10 16:29:05 2013
@@ -617,10 +617,19 @@ void LiveRange::print(raw_ostream &OS) c
}
}
+void LiveInterval::print(raw_ostream &OS) const {
+ OS << PrintReg(reg) << ' ';
+ super::print(OS);
+}
+
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
void LiveRange::dump() const {
dbgs() << *this << "\n";
}
+
+void LiveInterval::dump() const {
+ dbgs() << *this << "\n";
+}
#endif
#ifndef NDEBUG
Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=192398&r1=192397&r2=192398&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Thu Oct 10 16:29:05 2013
@@ -141,13 +141,13 @@ void LiveIntervals::print(raw_ostream &O
// Dump the regunits.
for (unsigned i = 0, e = RegUnitRanges.size(); i != e; ++i)
if (LiveRange *LR = RegUnitRanges[i])
- OS << PrintRegUnit(i, TRI) << " = " << *LR << '\n';
+ OS << PrintRegUnit(i, TRI) << ' ' << *LR << '\n';
// Dump the virtregs.
for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) {
unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
if (hasInterval(Reg))
- OS << PrintReg(Reg) << " = " << getInterval(Reg) << '\n';
+ OS << getInterval(Reg) << '\n';
}
OS << "RegMasks:";
Modified: llvm/trunk/lib/CodeGen/MachineVerifier.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineVerifier.cpp?rev=192398&r1=192397&r2=192398&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineVerifier.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineVerifier.cpp Thu Oct 10 16:29:05 2013
@@ -419,23 +419,13 @@ void MachineVerifier::report(const char
void MachineVerifier::report(const char *msg, const MachineFunction *MF,
const LiveInterval &LI) {
report(msg, MF);
- *OS << "- interval: ";
- if (TargetRegisterInfo::isVirtualRegister(LI.reg))
- *OS << PrintReg(LI.reg, TRI);
- else
- *OS << PrintRegUnit(LI.reg, TRI);
- *OS << ' ' << LI << '\n';
+ *OS << "- interval: " << LI << '\n';
}
void MachineVerifier::report(const char *msg, const MachineBasicBlock *MBB,
const LiveInterval &LI) {
report(msg, MBB);
- *OS << "- interval: ";
- if (TargetRegisterInfo::isVirtualRegister(LI.reg))
- *OS << PrintReg(LI.reg, TRI);
- else
- *OS << PrintRegUnit(LI.reg, TRI);
- *OS << ' ' << LI << '\n';
+ *OS << "- interval: " << LI << '\n';
}
void MachineVerifier::report(const char *msg, const MachineBasicBlock *MBB,
Modified: llvm/trunk/lib/CodeGen/RegAllocBase.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocBase.cpp?rev=192398&r1=192397&r2=192398&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocBase.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocBase.cpp Thu Oct 10 16:29:05 2013
@@ -99,7 +99,7 @@ void RegAllocBase::allocatePhysRegs() {
// result from splitting.
DEBUG(dbgs() << "\nselectOrSplit "
<< MRI->getRegClass(VirtReg->reg)->getName()
- << ':' << PrintReg(VirtReg->reg) << ' ' << *VirtReg << '\n');
+ << ':' << *VirtReg << '\n');
typedef SmallVector<unsigned, 4> VirtRegVec;
VirtRegVec SplitVRegs;
unsigned AvailablePhysReg = selectOrSplit(*VirtReg, SplitVRegs);
Modified: llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp?rev=192398&r1=192397&r2=192398&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp Thu Oct 10 16:29:05 2013
@@ -1156,10 +1156,12 @@ bool RegisterCoalescer::joinCopy(Machine
TRI->UpdateRegAllocHint(CP.getSrcReg(), CP.getDstReg(), *MF);
DEBUG({
- dbgs() << "\tJoined. Result = " << PrintReg(CP.getDstReg(), TRI);
- if (!CP.isPhys())
+ dbgs() << "\tJoined. Result = ";
+ if (CP.isPhys())
+ dbgs() << PrintReg(CP.getDstReg(), TRI);
+ else
dbgs() << LIS->getInterval(CP.getDstReg());
- dbgs() << '\n';
+ dbgs() << '\n';
});
++numJoins;
@@ -1171,8 +1173,7 @@ bool RegisterCoalescer::joinReservedPhys
assert(CP.isPhys() && "Must be a physreg copy");
assert(MRI->isReserved(CP.getDstReg()) && "Not a reserved register");
LiveInterval &RHS = LIS->getInterval(CP.getSrcReg());
- DEBUG(dbgs() << "\t\tRHS = " << PrintReg(CP.getSrcReg()) << ' ' << RHS
- << '\n');
+ DEBUG(dbgs() << "\t\tRHS = " << RHS << '\n');
assert(CP.isFlipped() && RHS.containsOneValue() &&
"Invalid join with reserved register");
@@ -1968,8 +1969,8 @@ bool RegisterCoalescer::joinVirtRegs(Coa
JoinVals RHSVals(RHS, CP.getSrcIdx(), NewVNInfo, CP, LIS, TRI);
JoinVals LHSVals(LHS, CP.getDstIdx(), NewVNInfo, CP, LIS, TRI);
- DEBUG(dbgs() << "\t\tRHS = " << PrintReg(CP.getSrcReg()) << ' ' << RHS
- << "\n\t\tLHS = " << PrintReg(CP.getDstReg()) << ' ' << LHS
+ DEBUG(dbgs() << "\t\tRHS = " << RHS
+ << "\n\t\tLHS = " << LHS
<< '\n');
// First compute NewVNInfo and the simple value mappings.
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