[Patch] X86 horizontal vector reduction cost model

[Arnold Schwaighofer]

On Sep 18, 2013, at 4:17 PM, Eric Christopher <echristo at gmail.com> wrote:

> +    { ISD::ADD,   MVT::v4i32,   3 },      // The raw data is 2.8,
> +    { ISD::ADD,   MVT::v4i64,   3 },      // Use Data from avx
> 
> These comments seem next to useless? Not sure where you've grabbed the
> data from or what raw data means.

These numbers are throughput as reported by intel's architecture code analyzer tool. But you are right nobody - except Yi and Me know that.
Yi can you add a comment to that effect.


> 
> Odd formatting nit:
> 
> +    { ISD::FADD,   MVT::v8f32,   4 },     // Use Data from avx
> +    { ISD::ADD,   MVT::v2i64,   1 },      // The raw data is 1.5
> 
> If you're going to use multiple spaces after a , then why not line up
> the columns? Otherwise you may as well make it a single space :)
> 
> -eric
> 
> 
> On Wed, Sep 18, 2013 at 1:50 PM, yijiang <yjiang at apple.com> wrote:
>> Hi Arnolds et al.
>> 
>> This patch is to polish horizontal vector reduction cost model for X86 target. Please help to review it. Thank you.
>> 
>> 
>> 
>> -Yi
>> 
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