[llvm] r189754 - llvm/test/CodeGen/X86: Update tests with -mattr=-bmi not to take BMI, corresponding to Craig's r189742.

[NAKAMURA Takumi]

Author: chapuni
Date: Mon Sep  2 07:00:46 2013
New Revision: 189754

URL: http://llvm.org/viewvc/llvm-project?rev=189754&view=rev
Log:
llvm/test/CodeGen/X86: Update tests with -mattr=-bmi not to take BMI, corresponding to Craig's r189742.

AMD Piledriver builder detected failures.

Modified:
    llvm/trunk/test/CodeGen/X86/h-register-addressing-32.ll
    llvm/trunk/test/CodeGen/X86/h-register-addressing-64.ll
    llvm/trunk/test/CodeGen/X86/h-registers-0.ll
    llvm/trunk/test/CodeGen/X86/h-registers-1.ll
    llvm/trunk/test/CodeGen/X86/ins_subreg_coalesce-1.ll

Modified: llvm/trunk/test/CodeGen/X86/h-register-addressing-32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/h-register-addressing-32.ll?rev=189754&r1=189753&r2=189754&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/h-register-addressing-32.ll (original)
+++ llvm/trunk/test/CodeGen/X86/h-register-addressing-32.ll Mon Sep  2 07:00:46 2013
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | grep "movzbl	%[abcd]h," | count 7
+; RUN: llc < %s -march=x86 -mattr=-bmi | grep "movzbl	%[abcd]h," | count 7
 
 ; Use h-register extract and zero-extend.
 

Modified: llvm/trunk/test/CodeGen/X86/h-register-addressing-64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/h-register-addressing-64.ll?rev=189754&r1=189753&r2=189754&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/h-register-addressing-64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/h-register-addressing-64.ll Mon Sep  2 07:00:46 2013
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | grep "movzbl	%[abcd]h," | count 7
+; RUN: llc < %s -march=x86-64 -mattr=-bmi | grep "movzbl	%[abcd]h," | count 7
 
 ; Use h-register extract and zero-extend.
 

Modified: llvm/trunk/test/CodeGen/X86/h-registers-0.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/h-registers-0.ll?rev=189754&r1=189753&r2=189754&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/h-registers-0.ll (original)
+++ llvm/trunk/test/CodeGen/X86/h-registers-0.ll Mon Sep  2 07:00:46 2013
@@ -1,6 +1,6 @@
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=X86-64
-; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s -check-prefix=WIN64
-; RUN: llc < %s -march=x86    | FileCheck %s -check-prefix=X86-32
+; RUN: llc < %s -mattr=-bmi -mtriple=x86_64-linux | FileCheck %s -check-prefix=X86-64
+; RUN: llc < %s -mattr=-bmi -mtriple=x86_64-win32 | FileCheck %s -check-prefix=WIN64
+; RUN: llc < %s -mattr=-bmi -march=x86    | FileCheck %s -check-prefix=X86-32
 
 ; Use h registers. On x86-64, codegen doesn't support general allocation
 ; of h registers yet, due to x86 encoding complications.

Modified: llvm/trunk/test/CodeGen/X86/h-registers-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/h-registers-1.ll?rev=189754&r1=189753&r2=189754&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/h-registers-1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/h-registers-1.ll Mon Sep  2 07:00:46 2013
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-linux > %t
+; RUN: llc -mattr=-bmi < %s -mtriple=x86_64-linux > %t
 ; RUN: grep "movzbl	%[abcd]h," %t | count 8
 ; RUN: grep "%[abcd]h" %t | not grep "%r[[:digit:]]*d"
 

Modified: llvm/trunk/test/CodeGen/X86/ins_subreg_coalesce-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/ins_subreg_coalesce-1.ll?rev=189754&r1=189753&r2=189754&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/ins_subreg_coalesce-1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/ins_subreg_coalesce-1.ll Mon Sep  2 07:00:46 2013
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -march=x86 -mattr=-bmi | FileCheck %s
 
 define fastcc i32 @t() nounwind  {
 entry: