[PATCH] SelectionDAG: Use correct pointer size when splitting vector stores

Quentin Colombet qcolombet at apple.com
Thu Aug 15 11:23:51 PDT 2013


Hi Tom,

LGTM.

Thanks,

-Quentin

On Aug 14, 2013, at 5:39 PM, Tom Stellard <tom at stellard.net> wrote:

> From: Tom Stellard <thomas.stellard at amd.com>
> 
> ---
> lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp |  2 +-
> test/CodeGen/R600/store.ll                       | 15 +++++++++++++++
> 2 files changed, 16 insertions(+), 1 deletion(-)
> 
> diff --git a/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
> index 0637412..0406eb6 100644
> --- a/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
> +++ b/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
> @@ -1268,7 +1268,7 @@ SDValue DAGTypeLegalizer::SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo) {
> 
>   // Increment the pointer to the other half.
>   Ptr = DAG.getNode(ISD::ADD, DL, Ptr.getValueType(), Ptr,
> -                    DAG.getIntPtrConstant(IncrementSize));
> +                    DAG.getConstant(IncrementSize, Ptr.getValueType()));
> 
>   if (isTruncating)
>     Hi = DAG.getTruncStore(Ch, DL, Hi, Ptr,
> diff --git a/test/CodeGen/R600/store.ll b/test/CodeGen/R600/store.ll
> index defbf91..365c292 100644
> --- a/test/CodeGen/R600/store.ll
> +++ b/test/CodeGen/R600/store.ll
> @@ -230,6 +230,21 @@ entry:
>   ret void
> }
> 
> +; EG-CHECK: @store_local_v4i8
> +; EG-CHECK: LDS_WRITE
> +; CM-CHECK: @store_local_v4i8
> +; CM-CHECK: LDS_WRITE
> +; SI-CHECK: @store_local_v4i8
> +; SI-CHECK: DS_WRITE_B8
> +; SI-CHECK: DS_WRITE_B8
> +; SI-CHECK: DS_WRITE_B8
> +; SI-CHECK: DS_WRITE_B8
> +define void @store_local_v4i8(<4 x i8> addrspace(3)* %out, <4 x i8> %in) {
> +entry:
> +  store <4 x i8> %in, <4 x i8> addrspace(3)* %out
> +  ret void
> +}
> +
> ; EG-CHECK: @store_local_v2i32
> ; EG-CHECK: LDS_WRITE
> ; EG-CHECK: LDS_WRITE
> -- 
> 1.7.11.4
> 
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