[llvm] r183624 - ARM FastISel fix load register classes

[Tim Northover]

> My dim memory is that there was a plan to enable MI validation by default in
> debug builds once the failures are cleaned up in the test suite.

That sounds like a very good cause. I was a little surprised when I
found it wasn't so already a while back. It discovered real issues in
the AArch64 backend, and I can't recall any diagnoses I'd call overly
pedantic.

Seems like a good use of any time I'm bored, in fact...

Tim.