[llvm] r183492 - Don't cache the instruction and register info from the TargetMachine, because
Bill Wendling
isanbard at gmail.com
Thu Jun 6 23:30:15 PDT 2013
Author: void
Date: Fri Jun 7 01:30:15 2013
New Revision: 183492
URL: http://llvm.org/viewvc/llvm-project?rev=183492&view=rev
Log:
Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.
Modified:
llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.cpp
llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.cpp
llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.h
Modified: llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.cpp?rev=183492&r1=183491&r2=183492&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.cpp Fri Jun 7 01:30:15 2013
@@ -29,7 +29,7 @@ using namespace llvm;
MSP430InstrInfo::MSP430InstrInfo(MSP430TargetMachine &tm)
: MSP430GenInstrInfo(MSP430::ADJCALLSTACKDOWN, MSP430::ADJCALLSTACKUP),
- RI(tm, *this) {}
+ RI(tm) {}
void MSP430InstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
Modified: llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.cpp?rev=183492&r1=183491&r2=183492&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.cpp Fri Jun 7 01:30:15 2013
@@ -32,9 +32,8 @@
using namespace llvm;
// FIXME: Provide proper call frame setup / destroy opcodes.
-MSP430RegisterInfo::MSP430RegisterInfo(MSP430TargetMachine &tm,
- const TargetInstrInfo &tii)
- : MSP430GenRegisterInfo(MSP430::PCW), TM(tm), TII(tii) {
+MSP430RegisterInfo::MSP430RegisterInfo(MSP430TargetMachine &tm)
+ : MSP430GenRegisterInfo(MSP430::PCW), TM(tm) {
StackAlign = TM.getFrameLowering()->getStackAlignment();
}
@@ -132,6 +131,7 @@ MSP430RegisterInfo::eliminateFrameIndex(
// This is actually "load effective address" of the stack slot
// instruction. We have only two-address instructions, thus we need to
// expand it into mov + add
+ const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
MI.setDesc(TII.get(MSP430::MOV16rr));
MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
Modified: llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.h?rev=183492&r1=183491&r2=183492&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.h (original)
+++ llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.h Fri Jun 7 01:30:15 2013
@@ -27,13 +27,12 @@ class MSP430TargetMachine;
struct MSP430RegisterInfo : public MSP430GenRegisterInfo {
private:
MSP430TargetMachine &TM;
- const TargetInstrInfo &TII;
/// StackAlign - Default stack alignment.
///
unsigned StackAlign;
public:
- MSP430RegisterInfo(MSP430TargetMachine &tm, const TargetInstrInfo &tii);
+ MSP430RegisterInfo(MSP430TargetMachine &tm);
/// Code Generation virtual methods...
const uint16_t *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
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