[llvm] r183472 - ARM sched model: Add VFP div instruction on Swift

Arnold Schwaighofer aschwaighofer at apple.com
Thu Jun 6 18:10:36 PDT 2013


Author: arnolds
Date: Thu Jun  6 20:10:36 2013
New Revision: 183472

URL: http://llvm.org/viewvc/llvm-project?rev=183472&view=rev
Log:
ARM sched model: Add VFP div instruction on Swift

Reapply 183271.

Modified:
    llvm/trunk/lib/Target/ARM/ARMScheduleSwift.td

Modified: llvm/trunk/lib/Target/ARM/ARMScheduleSwift.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMScheduleSwift.td?rev=183472&r1=183471&r2=183472&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMScheduleSwift.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMScheduleSwift.td Thu Jun  6 20:10:36 2013
@@ -2043,6 +2043,22 @@ let SchedModel = SwiftModel in {
         (instregex "VST4LN(d|q)(8|16|32)_UPD",
                    "VST4LN(d|q)(8|16|32)Pseudo_UPD")>;
 
+  // 4.2.44 VFP, Divide and Square Root
+  def SwiftDiv17 : SchedWriteRes<[SwiftUnitP0, SwiftUnitDiv]> {
+    let NumMicroOps = 1;
+    let Latency = 17;
+    let ResourceCycles = [1, 15];
+  }
+  def SwiftDiv32 : SchedWriteRes<[SwiftUnitP0, SwiftUnitDiv]> {
+    let NumMicroOps = 1;
+    let Latency = 32;
+    let ResourceCycles = [1, 30];
+  }
+  def : InstRW<[SwiftDiv17], (instregex "VDIVS", "VSQRTS")>;
+  def : InstRW<[SwiftDiv32], (instregex "VDIVD", "VSQRTD")>;
+
+  // Not specified.
+  def : InstRW<[SwiftWriteP01OneCycle2x], (instregex "ABS")>;
   // Preload.
   def : WriteRes<WritePreLd, [SwiftUnitP2]> { let Latency = 0;
     let ResourceCycles = [0];





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