[PATCH] Allow blocks to be merged when one has an undef input to a phi.

[Mark Lacey]

Duncan,

I went ahead and regenerated the patch with the test case below added, just in case there isn't already a case that will trigger an assert/crash when these incoming values are not added to the phi.

The new patch is attached.

-------------- next part --------------
A non-text attachment was scrubbed...
Name: 0001-Allow-blocks-to-be-merged-when-one-has-an-undef-inpu.patch
Type: application/octet-stream
Size: 16809 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20130606/150e179e/attachment.obj>
-------------- next part --------------


Mark

> We need to add the incoming values to the phi for all the new edges being redirected from the predecessor (this was already happening before my change as well). 
> 
> Consider a case like this:
> 
> define i8 @testmergesome(i32 %u, i32* %A) {
> V:
>  switch i32 %u, label %Y [
>    i32 0, label %W
>    i32 1, label %X
>    i32 2, label %X
>    i32 3, label %Z
>  ]
> 
> W:                                            ; preds = %V
>  store i32 1, i32* %A, align 4
>  br label %Y
> 
> Z:
>  store i32 0, i32* %A, align 4
>  br label %X
> 
> X:                                           ; preds = %V, %Z
>  br label %Y
> 
> Y:                                        ; preds = %X, %W, %V
>  ; After merging X into Y, we should have 5 predecessors
>  ; and thus 5 incoming values to the phi.
>  %val.0 = phi i8 [ 1, %V ], [ 1, %X ], [ 2, %W ]
>  ret i8 %val.0
> }
> 
> When we merge X and Y, we need to add X's predecessors (V and Z) with incoming values to the phi, despite the fact that the phi already as an incoming edge from V (and despite the fact that the value coming in is the same). 
> 
> Otherwise we would end up with a result like this:
> 
> define i8 @testmergesome(i32 %u, i32* %A) {
> V:
>  switch i32 %u, label %Y [
>    i32 0, label %W
>    i32 1, label %Y
>    i32 2, label %Y
>    i32 3, label %Z
>  ]
> 
> W:                                                ; preds = %V
>  store i32 1, i32* %A, align 4
>  br label %Y
> 
> Z:                                                ; preds = %V
>  store i32 0, i32* %A, align 4
>  br label %Y
> 
> Y:                                                ; preds = %V, %V, %Z, %W, %V
>  %val.0 = phi i8 [ 1, %V ], [ 2, %W ], [ 1, %Z ]
>  ret i8 %val.0
> }
> 
> 
> Here, Y has five predecessors but only three incoming values in the phi.
> 
> These additional incoming values and associated control-flow do end up getting cleaned up properly in other simplifications  (e.g. in this instance case 1 and 2 of the switch would be removed by switch simplification since they now target the same block as the switch default).
> 
> Mark
>