[llvm] r183238 - ARM: Fix crash in ARM backend inside of ARMConstantIslandPass

David Majnemer david.majnemer at gmail.com
Tue Jun 4 10:46:16 PDT 2013


Author: majnemer
Date: Tue Jun  4 12:46:15 2013
New Revision: 183238

URL: http://llvm.org/viewvc/llvm-project?rev=183238&view=rev
Log:
ARM: Fix crash in ARM backend inside of ARMConstantIslandPass

The ARM backend did not expect LDRBi12 to hold a constant pool operand.
Allow for LLVM to deal with the instruction similar to how it deals with
LDRi12.

This fixes PR16215.

Added:
    llvm/trunk/test/CodeGen/ARM/load-address-masked.ll
Modified:
    llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp?rev=183238&r1=183237&r2=183238&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp Tue Jun  4 12:46:15 2013
@@ -753,6 +753,7 @@ initializeFunctionInfo(const std::vector
             Scale = 4;
             break;
 
+          case ARM::LDRBi12:
           case ARM::LDRi12:
           case ARM::LDRcp:
           case ARM::t2LDRpci:

Added: llvm/trunk/test/CodeGen/ARM/load-address-masked.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/load-address-masked.ll?rev=183238&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/load-address-masked.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/load-address-masked.ll Tue Jun  4 12:46:15 2013
@@ -0,0 +1,14 @@
+; RUN: llc < %s -mtriple=armv4t-unknown-linux-gnueabi -verify-machineinstrs | FileCheck %s
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64"
+target triple = "armv4t-unknown-linux-gnueabi"
+
+ at a = global i32 0, align 4
+
+define i32 @foo() {
+entry:
+  ret i32 and (i32 ptrtoint (i32* @a to i32), i32 255)
+}
+
+; CHECK: foo:
+; CHECK: ldrb    r0, .LCPI0_0





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