[PATCH] Fix spilling of 64-bit paired registers (PR15676)

[Tim Northover]

Hi,

This patch should fix PR15676, which turned out to be due to an
incorrect LDMIA instruction being produced when spilling a 64-bit
paired register (like you get from some inline assembly).

It looked like:

LDMIA <fi#4>, pred:0, pred:14, %noreg, ...

Where that first "pred:0" was added as some kind of offset for the
frame, but the LDMIA instruction has no such offset.

This could obviously have caused a problem anywhere, it happened to
strike first (in a Debug build) when examining the predicate (ARM code
expected the second "pred" to be a register).

OK to commit?

Tim.
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