[llvm] r178123 - Allocate r0 on PPC

[Hal Finkel]

Author: hfinkel
Date: Wed Mar 27 01:52:27 2013
New Revision: 178123

URL: http://llvm.org/viewvc/llvm-project?rev=178123&view=rev
Log:
Allocate r0 on PPC

The R0 register can now be allocated because instructions
that cannot use R0 as a GPR have been appropriately marked.

Added:
    llvm/trunk/test/CodeGen/PowerPC/allocate-r0.ll
Modified:
    llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp

Modified: llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp?rev=178123&r1=178122&r2=178123&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp Wed Mar 27 01:52:27 2013
@@ -134,7 +134,6 @@ BitVector PPCRegisterInfo::getReservedRe
   Reserved.set(PPC::FP);
   Reserved.set(PPC::FP8);
 
-  Reserved.set(PPC::R0);
   Reserved.set(PPC::R1);
   Reserved.set(PPC::LR);
   Reserved.set(PPC::LR8);
@@ -150,7 +149,6 @@ BitVector PPCRegisterInfo::getReservedRe
   if (Subtarget.isPPC64()) {
     Reserved.set(PPC::R13);
 
-    Reserved.set(PPC::X0);
     Reserved.set(PPC::X1);
     Reserved.set(PPC::X13);
 

Added: llvm/trunk/test/CodeGen/PowerPC/allocate-r0.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/allocate-r0.ll?rev=178123&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/allocate-r0.ll (added)
+++ llvm/trunk/test/CodeGen/PowerPC/allocate-r0.ll Wed Mar 27 01:52:27 2013
@@ -0,0 +1,18 @@
+; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=g5 | FileCheck %s
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
+target triple = "powerpc64-unknown-linux-gnu"
+
+define i64 @foo(i64 %a) nounwind {
+entry:
+  call void asm sideeffect "", "~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12}"() nounwind
+  br label %return
+
+; CHECK: @foo
+; Because r0 is allocatable, we can use it to hold r3 without spilling.
+; CHECK: mr 0, 3
+; CHECK: mr 3, 0
+
+return:                                           ; preds = %entry
+  ret i64 %a
+}
+