[llvm] r178121 - Use the PPC no-r0 class on the TOC LD pseudos
Hal Finkel
hfinkel at anl.gov
Tue Mar 26 23:36:55 PDT 2013
Author: hfinkel
Date: Wed Mar 27 01:36:55 2013
New Revision: 178121
URL: http://llvm.org/viewvc/llvm-project?rev=178121&view=rev
Log:
Use the PPC no-r0 class on the TOC LD pseudos
The register parameter in these instructions becomes the base register in an
r+i ld instruction (and, thus, cannot be r0).
This is not yet testable because we don't yet allocate r0 (and even then any
test would be very fragile).
Modified:
llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td
Modified: llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td?rev=178121&r1=178120&r2=178121&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td Wed Mar 27 01:36:55 2013
@@ -680,7 +680,7 @@ def ADDIStocHA: Pseudo<(outs G8RC:$rD),
[(set i64:$rD,
(PPCaddisTocHA i64:$reg, tglobaladdr:$disp))]>,
isPPC64;
-def LDtocL: Pseudo<(outs G8RC:$rD), (ins tocentry:$disp, G8RC:$reg),
+def LDtocL: Pseudo<(outs G8RC:$rD), (ins tocentry:$disp, G8RC_NOX0:$reg),
"#LDtocL",
[(set i64:$rD,
(PPCldTocL tglobaladdr:$disp, i64:$reg))]>, isPPC64;
@@ -696,7 +696,7 @@ def ADDISgotTprelHA: Pseudo<(outs G8RC:$
(PPCaddisGotTprelHA i64:$reg,
tglobaltlsaddr:$disp))]>,
isPPC64;
-def LDgotTprelL: Pseudo<(outs G8RC:$rD), (ins symbolLo64:$disp, G8RC:$reg),
+def LDgotTprelL: Pseudo<(outs G8RC:$rD), (ins symbolLo64:$disp, G8RC_NOX0:$reg),
"#LDgotTprelL",
[(set i64:$rD,
(PPCldGotTprelL tglobaltlsaddr:$disp, i64:$reg))]>,
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