[PATCH] Fix DecodeT2LdStPre

[Joe Abbey]

Patch by Gordon Keiser, with test case!

This patch addresses failure to decode encoding T4 of LDR (A8.8.62) and is a postindexed load, where the offset 0xc is applied to SP after the load occurs.   Rn is decoded with DecodeGPRRegisterClass but Rt is decoded (in what I assume is either a typo or misreading of the ARM manuals) with DecoderGPRRegisterClass.   Note the wonderful differentiation with the lowercase "r".   In any case, if PC or SP is the destination, the disassembler erroneously failed with the invalid encoding, despite the manual saying that both are fine.

Ok to commit?

Joe
______________________________
Joe Abbey
Senior Director of Product Development
Arxan Technologies
jabbey at arxan.com<mailto:jabbey at arxan.com> www.arxan.com<http://www.arxan.com/>

-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20130325/cae4bdd3/attachment.html>
-------------- next part --------------
A non-text attachment was scrubbed...
Name: DecodeT2LdStPreFix.patch
Type: application/octet-stream
Size: 1179 bytes
Desc: DecodeT2LdStPreFix.patch
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20130325/cae4bdd3/attachment.obj>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20130325/cae4bdd3/attachment.htm>