[PATCH] [RFC][5/17]TILE-Gx: add register information for tilegx

[Jiong WANG]

tilegx has 64 64-bit registers. They can also serve as 32-bit register when operated by those 32-bit instructions.

0 - 9      r0 - r9     Caller-saved Parameter passing / return values
10 - 29  r10 - r29  Caller-saved
30 - 51  r30 - r51  Callee-saved
52        r52          Callee-saved optional frame pointer
53        tp            Dedicated Thread-local data
54        sp           Dedicated Stack pointer
55        lr             Caller-saved Return address
63        zero         Always zero

For more info, please see ABI manul:
  http://www.tilera.com/scm/docs/index.html

Please review, thanks.

---
Regards,
Jiong
Tilera Corporation.

http://llvm-reviews.chandlerc.com/D515

Files:
  lib/Target/Tile/TileRegisterInfo.cpp
  lib/Target/Tile/TileRegisterInfo.h
  lib/Target/Tile/TileRegisterInfo.td
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D515.1.patch
Type: text/x-patch
Size: 20028 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20130311/4c233ec8/attachment.bin>