[llvm] r176777 - Don't glue users to extract_subreg when selecting the llvm.arm.ldrexd
David Blaikie
dblaikie at gmail.com
Sun Mar 10 00:47:01 PST 2013
On Mar 9, 2013 3:00 PM, "Lang Hames" <lhames at gmail.com> wrote:
>
> Author: lhames
> Date: Sat Mar 9 16:56:09 2013
> New Revision: 176777
>
> URL: http://llvm.org/viewvc/llvm-project?rev=176777&view=rev
> Log:
> Don't glue users to extract_subreg when selecting the llvm.arm.ldrexd
> intrinsic - it can cause impossible-to-schedule subgraphs to be
> introduced.
>
> PR15053.
>
>
> Added:
> llvm/trunk/test/CodeGen/ARM/2013-03-09-PR15053.ll
Not sure if this is universally true but in many parts of llvm & clang
we've generally moved away from putting dates in test case names like this.
(And the other caveat of: if possible, it's nice to add a test case to an
existing test file/run than to add another - reducing the number of
processes created keeps test cycle time low)
> Modified:
> llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
>
> Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
> URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp?rev=176777&r1=176776&r2=176777&view=diff
>
==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp Sat Mar 9 16:56:09 2013
> @@ -3155,7 +3155,7 @@ SDNode *ARMDAGToDAGISel::Select(SDNode *
> cast<MachineSDNode>(Ld)->setMemRefs(MemOp, MemOp + 1);
>
> // Remap uses.
> - SDValue Glue = isThumb ? SDValue(Ld, 2) : SDValue(Ld, 1);
> + SDValue OutChain = isThumb ? SDValue(Ld, 2) : SDValue(Ld, 1);
> if (!SDValue(N, 0).use_empty()) {
> SDValue Result;
> if (isThumb)
> @@ -3163,9 +3163,8 @@ SDNode *ARMDAGToDAGISel::Select(SDNode *
> else {
> SDValue SubRegIdx = CurDAG->getTargetConstant(ARM::gsub_0,
MVT::i32);
> SDNode *ResNode =
CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG,
> - dl, MVT::i32, MVT::Glue, SDValue(Ld, 0), SubRegIdx, Glue);
> + dl, MVT::i32, SDValue(Ld, 0), SubRegIdx);
> Result = SDValue(ResNode,0);
> - Glue = Result.getValue(1);
> }
> ReplaceUses(SDValue(N, 0), Result);
> }
> @@ -3176,13 +3175,12 @@ SDNode *ARMDAGToDAGISel::Select(SDNode *
> else {
> SDValue SubRegIdx = CurDAG->getTargetConstant(ARM::gsub_1,
MVT::i32);
> SDNode *ResNode =
CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG,
> - dl, MVT::i32, MVT::Glue, SDValue(Ld, 0), SubRegIdx, Glue);
> + dl, MVT::i32, SDValue(Ld, 0), SubRegIdx);
> Result = SDValue(ResNode,0);
> - Glue = Result.getValue(1);
> }
> ReplaceUses(SDValue(N, 1), Result);
> }
> - ReplaceUses(SDValue(N, 2), Glue);
> + ReplaceUses(SDValue(N, 2), OutChain);
> return NULL;
> }
>
>
> Added: llvm/trunk/test/CodeGen/ARM/2013-03-09-PR15053.ll
> URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2013-03-09-PR15053.ll?rev=176777&view=auto
>
==============================================================================
> --- llvm/trunk/test/CodeGen/ARM/2013-03-09-PR15053.ll (added)
> +++ llvm/trunk/test/CodeGen/ARM/2013-03-09-PR15053.ll Sat Mar 9 16:56:09
2013
> @@ -0,0 +1,13 @@
> +; RUN: llc -mtriple=armv7 < %s
> +; PR15053
> +
> +declare i32 @llvm.arm.strexd(i32, i32, i8*) nounwind
> +declare { i32, i32 } @llvm.arm.ldrexd(i8*) nounwind readonly
> +
> +define void @foo() {
> +entry:
> + %0 = tail call { i32, i32 } @llvm.arm.ldrexd(i8* undef) nounwind
> + %1 = extractvalue { i32, i32 } %0, 0
> + %2 = tail call i32 @llvm.arm.strexd(i32 %1, i32 undef, i8* undef)
nounwind
> + ret void
> +}
>
>
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